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00024 #include "tcg.h"
00025
00026 int gen_new_label(void);
00027
00028 static inline void tcg_gen_op1_i32(int opc, TCGv_i32 arg1)
00029 {
00030 *gen_opc_ptr++ = opc;
00031 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00032 }
00033
00034 static inline void tcg_gen_op1_i64(int opc, TCGv_i64 arg1)
00035 {
00036 *gen_opc_ptr++ = opc;
00037 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00038 }
00039
00040 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
00041 {
00042 *gen_opc_ptr++ = opc;
00043 *gen_opparam_ptr++ = arg1;
00044 }
00045
00046 static inline void tcg_gen_op2_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2)
00047 {
00048 *gen_opc_ptr++ = opc;
00049 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00050 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00051 }
00052
00053 static inline void tcg_gen_op2_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2)
00054 {
00055 *gen_opc_ptr++ = opc;
00056 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00057 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00058 }
00059
00060 static inline void tcg_gen_op2i_i32(int opc, TCGv_i32 arg1, TCGArg arg2)
00061 {
00062 *gen_opc_ptr++ = opc;
00063 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00064 *gen_opparam_ptr++ = arg2;
00065 }
00066
00067 static inline void tcg_gen_op2i_i64(int opc, TCGv_i64 arg1, TCGArg arg2)
00068 {
00069 *gen_opc_ptr++ = opc;
00070 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00071 *gen_opparam_ptr++ = arg2;
00072 }
00073
00074 static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
00075 {
00076 *gen_opc_ptr++ = opc;
00077 *gen_opparam_ptr++ = arg1;
00078 *gen_opparam_ptr++ = arg2;
00079 }
00080
00081 static inline void tcg_gen_op3_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00082 TCGv_i32 arg3)
00083 {
00084 *gen_opc_ptr++ = opc;
00085 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00086 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00087 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00088 }
00089
00090 static inline void tcg_gen_op3_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00091 TCGv_i64 arg3)
00092 {
00093 *gen_opc_ptr++ = opc;
00094 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00095 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00096 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00097 }
00098
00099 static inline void tcg_gen_op3i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00100 TCGArg arg3)
00101 {
00102 *gen_opc_ptr++ = opc;
00103 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00104 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00105 *gen_opparam_ptr++ = arg3;
00106 }
00107
00108 static inline void tcg_gen_op3i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00109 TCGArg arg3)
00110 {
00111 *gen_opc_ptr++ = opc;
00112 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00113 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00114 *gen_opparam_ptr++ = arg3;
00115 }
00116
00117 static inline void tcg_gen_ldst_op_i32(int opc, TCGv_i32 val, TCGv_ptr base,
00118 TCGArg offset)
00119 {
00120 *gen_opc_ptr++ = opc;
00121 *gen_opparam_ptr++ = GET_TCGV_I32(val);
00122 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
00123 *gen_opparam_ptr++ = offset;
00124 }
00125
00126 static inline void tcg_gen_ldst_op_i64(int opc, TCGv_i64 val, TCGv_ptr base,
00127 TCGArg offset)
00128 {
00129 *gen_opc_ptr++ = opc;
00130 *gen_opparam_ptr++ = GET_TCGV_I64(val);
00131 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
00132 *gen_opparam_ptr++ = offset;
00133 }
00134
00135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc, TCGv_i64 val, TCGv_i32 addr,
00136 TCGArg mem_index)
00137 {
00138 *gen_opc_ptr++ = opc;
00139 *gen_opparam_ptr++ = GET_TCGV_I64(val);
00140 *gen_opparam_ptr++ = GET_TCGV_I32(addr);
00141 *gen_opparam_ptr++ = mem_index;
00142 }
00143
00144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc, TCGv_i64 val, TCGv_i64 addr,
00145 TCGArg mem_index)
00146 {
00147 *gen_opc_ptr++ = opc;
00148 *gen_opparam_ptr++ = GET_TCGV_I64(val);
00149 *gen_opparam_ptr++ = GET_TCGV_I64(addr);
00150 *gen_opparam_ptr++ = mem_index;
00151 }
00152
00153 static inline void tcg_gen_op4_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00154 TCGv_i32 arg3, TCGv_i32 arg4)
00155 {
00156 *gen_opc_ptr++ = opc;
00157 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00158 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00159 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00160 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
00161 }
00162
00163 static inline void tcg_gen_op4_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00164 TCGv_i64 arg3, TCGv_i64 arg4)
00165 {
00166 *gen_opc_ptr++ = opc;
00167 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00168 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00169 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00170 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
00171 }
00172
00173 static inline void tcg_gen_op4i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00174 TCGv_i32 arg3, TCGArg arg4)
00175 {
00176 *gen_opc_ptr++ = opc;
00177 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00178 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00179 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00180 *gen_opparam_ptr++ = arg4;
00181 }
00182
00183 static inline void tcg_gen_op4i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00184 TCGv_i64 arg3, TCGArg arg4)
00185 {
00186 *gen_opc_ptr++ = opc;
00187 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00188 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00189 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00190 *gen_opparam_ptr++ = arg4;
00191 }
00192
00193 static inline void tcg_gen_op4ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00194 TCGArg arg3, TCGArg arg4)
00195 {
00196 *gen_opc_ptr++ = opc;
00197 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00198 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00199 *gen_opparam_ptr++ = arg3;
00200 *gen_opparam_ptr++ = arg4;
00201 }
00202
00203 static inline void tcg_gen_op4ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00204 TCGArg arg3, TCGArg arg4)
00205 {
00206 *gen_opc_ptr++ = opc;
00207 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00208 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00209 *gen_opparam_ptr++ = arg3;
00210 *gen_opparam_ptr++ = arg4;
00211 }
00212
00213 static inline void tcg_gen_op5_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00214 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5)
00215 {
00216 *gen_opc_ptr++ = opc;
00217 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00218 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00219 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00220 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
00221 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
00222 }
00223
00224 static inline void tcg_gen_op5_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00225 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5)
00226 {
00227 *gen_opc_ptr++ = opc;
00228 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00229 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00230 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00231 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
00232 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
00233 }
00234
00235 static inline void tcg_gen_op5i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00236 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5)
00237 {
00238 *gen_opc_ptr++ = opc;
00239 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00240 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00241 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00242 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
00243 *gen_opparam_ptr++ = arg5;
00244 }
00245
00246 static inline void tcg_gen_op5i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00247 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5)
00248 {
00249 *gen_opc_ptr++ = opc;
00250 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00251 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00252 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00253 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
00254 *gen_opparam_ptr++ = arg5;
00255 }
00256
00257 static inline void tcg_gen_op6_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00258 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5,
00259 TCGv_i32 arg6)
00260 {
00261 *gen_opc_ptr++ = opc;
00262 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00263 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00264 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00265 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
00266 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
00267 *gen_opparam_ptr++ = GET_TCGV_I32(arg6);
00268 }
00269
00270 static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00271 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5,
00272 TCGv_i64 arg6)
00273 {
00274 *gen_opc_ptr++ = opc;
00275 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00276 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00277 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00278 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
00279 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
00280 *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
00281 }
00282
00283 static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
00284 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5,
00285 TCGArg arg6)
00286 {
00287 *gen_opc_ptr++ = opc;
00288 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
00289 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
00290 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
00291 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
00292 *gen_opparam_ptr++ = arg5;
00293 *gen_opparam_ptr++ = arg6;
00294 }
00295
00296 static inline void tcg_gen_op6ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
00297 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5,
00298 TCGArg arg6)
00299 {
00300 *gen_opc_ptr++ = opc;
00301 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
00302 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
00303 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
00304 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
00305 *gen_opparam_ptr++ = arg5;
00306 *gen_opparam_ptr++ = arg6;
00307 }
00308
00309 static inline void gen_set_label(int n)
00310 {
00311 tcg_gen_op1i(INDEX_op_set_label, n);
00312 }
00313
00314 static inline void tcg_gen_br(int label)
00315 {
00316 tcg_gen_op1i(INDEX_op_br, label);
00317 }
00318
00319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
00320 {
00321 if (GET_TCGV_I32(ret) != GET_TCGV_I32(arg))
00322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
00323 }
00324
00325 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
00326 {
00327 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
00328 }
00329
00330
00331 static inline void tcg_gen_helperN(void *func, int flags, int sizemask,
00332 TCGArg ret, int nargs, TCGArg *args)
00333 {
00334 TCGv_ptr fn;
00335 fn = tcg_const_ptr((tcg_target_long)func);
00336 tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret,
00337 nargs, args);
00338 tcg_temp_free_ptr(fn);
00339 }
00340
00341
00342 static inline void tcg_gen_helper64(void *func, TCGv_i64 ret,
00343 TCGv_i64 a, TCGv_i64 b)
00344 {
00345 TCGv_ptr fn;
00346 TCGArg args[2];
00347 fn = tcg_const_ptr((tcg_target_long)func);
00348 args[0] = GET_TCGV_I64(a);
00349 args[1] = GET_TCGV_I64(b);
00350 tcg_gen_callN(&tcg_ctx, fn, 0, 7, GET_TCGV_I64(ret), 2, args);
00351 tcg_temp_free_ptr(fn);
00352 }
00353
00354
00355
00356 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
00357 {
00358 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
00359 }
00360
00361 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
00362 {
00363 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
00364 }
00365
00366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
00367 {
00368 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
00369 }
00370
00371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
00372 {
00373 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
00374 }
00375
00376 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
00377 {
00378 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
00379 }
00380
00381 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
00382 {
00383 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
00384 }
00385
00386 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
00387 {
00388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
00389 }
00390
00391 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
00392 {
00393 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
00394 }
00395
00396 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00397 {
00398 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
00399 }
00400
00401 static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00402 {
00403
00404 if (arg2 == 0) {
00405 tcg_gen_mov_i32(ret, arg1);
00406 } else {
00407 TCGv_i32 t0 = tcg_const_i32(arg2);
00408 tcg_gen_add_i32(ret, arg1, t0);
00409 tcg_temp_free_i32(t0);
00410 }
00411 }
00412
00413 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00414 {
00415 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
00416 }
00417
00418 static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
00419 {
00420 TCGv_i32 t0 = tcg_const_i32(arg1);
00421 tcg_gen_sub_i32(ret, t0, arg2);
00422 tcg_temp_free_i32(t0);
00423 }
00424
00425 static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00426 {
00427
00428 if (arg2 == 0) {
00429 tcg_gen_mov_i32(ret, arg1);
00430 } else {
00431 TCGv_i32 t0 = tcg_const_i32(arg2);
00432 tcg_gen_sub_i32(ret, arg1, t0);
00433 tcg_temp_free_i32(t0);
00434 }
00435 }
00436
00437 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00438 {
00439 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
00440 }
00441
00442 static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00443 {
00444
00445 if (arg2 == 0) {
00446 tcg_gen_movi_i32(ret, 0);
00447 } else if (arg2 == 0xffffffff) {
00448 tcg_gen_mov_i32(ret, arg1);
00449 } else {
00450 TCGv_i32 t0 = tcg_const_i32(arg2);
00451 tcg_gen_and_i32(ret, arg1, t0);
00452 tcg_temp_free_i32(t0);
00453 }
00454 }
00455
00456 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00457 {
00458 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
00459 }
00460
00461 static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00462 {
00463
00464 if (arg2 == 0xffffffff) {
00465 tcg_gen_movi_i32(ret, 0xffffffff);
00466 } else if (arg2 == 0) {
00467 tcg_gen_mov_i32(ret, arg1);
00468 } else {
00469 TCGv_i32 t0 = tcg_const_i32(arg2);
00470 tcg_gen_or_i32(ret, arg1, t0);
00471 tcg_temp_free_i32(t0);
00472 }
00473 }
00474
00475 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00476 {
00477 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
00478 }
00479
00480 static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00481 {
00482
00483 if (arg2 == 0) {
00484 tcg_gen_mov_i32(ret, arg1);
00485 } else {
00486 TCGv_i32 t0 = tcg_const_i32(arg2);
00487 tcg_gen_xor_i32(ret, arg1, t0);
00488 tcg_temp_free_i32(t0);
00489 }
00490 }
00491
00492 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00493 {
00494 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
00495 }
00496
00497 static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00498 {
00499 if (arg2 == 0) {
00500 tcg_gen_mov_i32(ret, arg1);
00501 } else {
00502 TCGv_i32 t0 = tcg_const_i32(arg2);
00503 tcg_gen_shl_i32(ret, arg1, t0);
00504 tcg_temp_free_i32(t0);
00505 }
00506 }
00507
00508 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00509 {
00510 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
00511 }
00512
00513 static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00514 {
00515 if (arg2 == 0) {
00516 tcg_gen_mov_i32(ret, arg1);
00517 } else {
00518 TCGv_i32 t0 = tcg_const_i32(arg2);
00519 tcg_gen_shr_i32(ret, arg1, t0);
00520 tcg_temp_free_i32(t0);
00521 }
00522 }
00523
00524 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00525 {
00526 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
00527 }
00528
00529 static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00530 {
00531 if (arg2 == 0) {
00532 tcg_gen_mov_i32(ret, arg1);
00533 } else {
00534 TCGv_i32 t0 = tcg_const_i32(arg2);
00535 tcg_gen_sar_i32(ret, arg1, t0);
00536 tcg_temp_free_i32(t0);
00537 }
00538 }
00539
00540 static inline void tcg_gen_brcond_i32(int cond, TCGv_i32 arg1, TCGv_i32 arg2,
00541 int label_index)
00542 {
00543 tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
00544 }
00545
00546 static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2,
00547 int label_index)
00548 {
00549 TCGv_i32 t0 = tcg_const_i32(arg2);
00550 tcg_gen_brcond_i32(cond, arg1, t0, label_index);
00551 tcg_temp_free_i32(t0);
00552 }
00553
00554 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00555 {
00556 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
00557 }
00558
00559 static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
00560 {
00561 TCGv_i32 t0 = tcg_const_i32(arg2);
00562 tcg_gen_mul_i32(ret, arg1, t0);
00563 tcg_temp_free_i32(t0);
00564 }
00565
00566 #ifdef TCG_TARGET_HAS_div_i32
00567 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00568 {
00569 tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2);
00570 }
00571
00572 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00573 {
00574 tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2);
00575 }
00576
00577 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00578 {
00579 tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2);
00580 }
00581
00582 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00583 {
00584 tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2);
00585 }
00586 #else
00587 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00588 {
00589 TCGv_i32 t0;
00590 t0 = tcg_temp_new_i32();
00591 tcg_gen_sari_i32(t0, arg1, 31);
00592 tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
00593 tcg_temp_free_i32(t0);
00594 }
00595
00596 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00597 {
00598 TCGv_i32 t0;
00599 t0 = tcg_temp_new_i32();
00600 tcg_gen_sari_i32(t0, arg1, 31);
00601 tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
00602 tcg_temp_free_i32(t0);
00603 }
00604
00605 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00606 {
00607 TCGv_i32 t0;
00608 t0 = tcg_temp_new_i32();
00609 tcg_gen_movi_i32(t0, 0);
00610 tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
00611 tcg_temp_free_i32(t0);
00612 }
00613
00614 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
00615 {
00616 TCGv_i32 t0;
00617 t0 = tcg_temp_new_i32();
00618 tcg_gen_movi_i32(t0, 0);
00619 tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
00620 tcg_temp_free_i32(t0);
00621 }
00622 #endif
00623
00624 #if TCG_TARGET_REG_BITS == 32
00625
00626 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
00627 {
00628 if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) {
00629 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
00630 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
00631 }
00632 }
00633
00634 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
00635 {
00636 tcg_gen_movi_i32(TCGV_LOW(ret), arg);
00637 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
00638 }
00639
00640 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
00641 tcg_target_long offset)
00642 {
00643 tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
00644 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
00645 }
00646
00647 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
00648 tcg_target_long offset)
00649 {
00650 tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
00651 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
00652 }
00653
00654 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
00655 tcg_target_long offset)
00656 {
00657 tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
00658 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
00659 }
00660
00661 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
00662 tcg_target_long offset)
00663 {
00664 tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
00665 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
00666 }
00667
00668 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
00669 tcg_target_long offset)
00670 {
00671 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
00672 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
00673 }
00674
00675 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
00676 tcg_target_long offset)
00677 {
00678 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
00679 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
00680 }
00681
00682 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
00683 tcg_target_long offset)
00684 {
00685
00686
00687 #ifdef TCG_TARGET_WORDS_BIGENDIAN
00688 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
00689 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
00690 #else
00691 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
00692 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
00693 #endif
00694 }
00695
00696 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
00697 tcg_target_long offset)
00698 {
00699 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
00700 }
00701
00702 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
00703 tcg_target_long offset)
00704 {
00705 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
00706 }
00707
00708 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
00709 tcg_target_long offset)
00710 {
00711 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
00712 }
00713
00714 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
00715 tcg_target_long offset)
00716 {
00717 #ifdef TCG_TARGET_WORDS_BIGENDIAN
00718 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
00719 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
00720 #else
00721 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
00722 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
00723 #endif
00724 }
00725
00726 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00727 {
00728 tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
00729 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
00730 TCGV_HIGH(arg2));
00731 }
00732
00733 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00734 {
00735 tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
00736 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
00737 TCGV_HIGH(arg2));
00738 }
00739
00740 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00741 {
00742 tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
00743 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
00744 }
00745
00746 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00747 {
00748 tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
00749 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
00750 }
00751
00752 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00753 {
00754 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
00755 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
00756 }
00757
00758 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00759 {
00760 tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
00761 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
00762 }
00763
00764 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00765 {
00766 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
00767 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
00768 }
00769
00770 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00771 {
00772 tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
00773 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
00774 }
00775
00776
00777
00778 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00779 {
00780 tcg_gen_helper64(tcg_helper_shl_i64, ret, arg1, arg2);
00781 }
00782
00783 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00784 {
00785 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
00786 }
00787
00788 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00789 {
00790 tcg_gen_helper64(tcg_helper_shr_i64, ret, arg1, arg2);
00791 }
00792
00793 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00794 {
00795 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
00796 }
00797
00798 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00799 {
00800 tcg_gen_helper64(tcg_helper_sar_i64, ret, arg1, arg2);
00801 }
00802
00803 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00804 {
00805 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
00806 }
00807
00808 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
00809 int label_index)
00810 {
00811 tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
00812 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
00813 TCGV_HIGH(arg2), cond, label_index);
00814 }
00815
00816 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00817 {
00818 TCGv_i64 t0;
00819 TCGv_i32 t1;
00820
00821 t0 = tcg_temp_new_i64();
00822 t1 = tcg_temp_new_i32();
00823
00824 tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0),
00825 TCGV_LOW(arg1), TCGV_LOW(arg2));
00826
00827 tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2));
00828 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
00829 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2));
00830 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
00831
00832 tcg_gen_mov_i64(ret, t0);
00833 tcg_temp_free_i64(t0);
00834 tcg_temp_free_i32(t1);
00835 }
00836
00837 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00838 {
00839 tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2);
00840 }
00841
00842 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00843 {
00844 tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2);
00845 }
00846
00847 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00848 {
00849 tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2);
00850 }
00851
00852 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00853 {
00854 tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2);
00855 }
00856
00857 #else
00858
00859 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
00860 {
00861 if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg))
00862 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
00863 }
00864
00865 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
00866 {
00867 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
00868 }
00869
00870 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_i64 arg2,
00871 tcg_target_long offset)
00872 {
00873 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
00874 }
00875
00876 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_i64 arg2,
00877 tcg_target_long offset)
00878 {
00879 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
00880 }
00881
00882 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_i64 arg2,
00883 tcg_target_long offset)
00884 {
00885 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
00886 }
00887
00888 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_i64 arg2,
00889 tcg_target_long offset)
00890 {
00891 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
00892 }
00893
00894 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_i64 arg2,
00895 tcg_target_long offset)
00896 {
00897 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
00898 }
00899
00900 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_i64 arg2,
00901 tcg_target_long offset)
00902 {
00903 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
00904 }
00905
00906 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_i64 arg2, tcg_target_long offset)
00907 {
00908 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
00909 }
00910
00911 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_i64 arg2,
00912 tcg_target_long offset)
00913 {
00914 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
00915 }
00916
00917 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_i64 arg2,
00918 tcg_target_long offset)
00919 {
00920 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
00921 }
00922
00923 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_i64 arg2,
00924 tcg_target_long offset)
00925 {
00926 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
00927 }
00928
00929 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_i64 arg2, tcg_target_long offset)
00930 {
00931 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
00932 }
00933
00934 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00935 {
00936 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
00937 }
00938
00939 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00940 {
00941 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
00942 }
00943
00944 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00945 {
00946 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
00947 }
00948
00949 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00950 {
00951 TCGv_i64 t0 = tcg_const_i64(arg2);
00952 tcg_gen_and_i64(ret, arg1, t0);
00953 tcg_temp_free_i64(t0);
00954 }
00955
00956 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00957 {
00958 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
00959 }
00960
00961 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00962 {
00963 TCGv_i64 t0 = tcg_const_i64(arg2);
00964 tcg_gen_or_i64(ret, arg1, t0);
00965 tcg_temp_free_i64(t0);
00966 }
00967
00968 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00969 {
00970 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
00971 }
00972
00973 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00974 {
00975 TCGv_i64 t0 = tcg_const_i64(arg2);
00976 tcg_gen_xor_i64(ret, arg1, t0);
00977 tcg_temp_free_i64(t0);
00978 }
00979
00980 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00981 {
00982 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
00983 }
00984
00985 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
00986 {
00987 if (arg2 == 0) {
00988 tcg_gen_mov_i64(ret, arg1);
00989 } else {
00990 TCGv_i64 t0 = tcg_const_i64(arg2);
00991 tcg_gen_shl_i64(ret, arg1, t0);
00992 tcg_temp_free_i64(t0);
00993 }
00994 }
00995
00996 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
00997 {
00998 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
00999 }
01000
01001 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01002 {
01003 if (arg2 == 0) {
01004 tcg_gen_mov_i64(ret, arg1);
01005 } else {
01006 TCGv_i64 t0 = tcg_const_i64(arg2);
01007 tcg_gen_shr_i64(ret, arg1, t0);
01008 tcg_temp_free_i64(t0);
01009 }
01010 }
01011
01012 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01013 {
01014 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
01015 }
01016
01017 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01018 {
01019 if (arg2 == 0) {
01020 tcg_gen_mov_i64(ret, arg1);
01021 } else {
01022 TCGv_i64 t0 = tcg_const_i64(arg2);
01023 tcg_gen_sar_i64(ret, arg1, t0);
01024 tcg_temp_free_i64(t0);
01025 }
01026 }
01027
01028 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
01029 int label_index)
01030 {
01031 tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
01032 }
01033
01034 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01035 {
01036 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
01037 }
01038
01039 #ifdef TCG_TARGET_HAS_div_i64
01040 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01041 {
01042 tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2);
01043 }
01044
01045 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01046 {
01047 tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2);
01048 }
01049
01050 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01051 {
01052 tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2);
01053 }
01054
01055 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01056 {
01057 tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2);
01058 }
01059 #else
01060 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01061 {
01062 TCGv_i64 t0;
01063 t0 = tcg_temp_new_i64();
01064 tcg_gen_sari_i64(t0, arg1, 63);
01065 tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
01066 tcg_temp_free_i64(t0);
01067 }
01068
01069 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01070 {
01071 TCGv_i64 t0;
01072 t0 = tcg_temp_new_i64();
01073 tcg_gen_sari_i64(t0, arg1, 63);
01074 tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
01075 tcg_temp_free_i64(t0);
01076 }
01077
01078 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01079 {
01080 TCGv_i64 t0;
01081 t0 = tcg_temp_new_i64();
01082 tcg_gen_movi_i64(t0, 0);
01083 tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
01084 tcg_temp_free_i64(t0);
01085 }
01086
01087 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01088 {
01089 TCGv_i64 t0;
01090 t0 = tcg_temp_new_i64();
01091 tcg_gen_movi_i64(t0, 0);
01092 tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
01093 tcg_temp_free_i64(t0);
01094 }
01095 #endif
01096
01097 #endif
01098
01099 static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01100 {
01101
01102 if (arg2 == 0) {
01103 tcg_gen_mov_i64(ret, arg1);
01104 } else {
01105 TCGv_i64 t0 = tcg_const_i64(arg2);
01106 tcg_gen_add_i64(ret, arg1, t0);
01107 tcg_temp_free_i64(t0);
01108 }
01109 }
01110
01111 static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
01112 {
01113 TCGv_i64 t0 = tcg_const_i64(arg1);
01114 tcg_gen_sub_i64(ret, t0, arg2);
01115 tcg_temp_free_i64(t0);
01116 }
01117
01118 static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01119 {
01120
01121 if (arg2 == 0) {
01122 tcg_gen_mov_i64(ret, arg1);
01123 } else {
01124 TCGv_i64 t0 = tcg_const_i64(arg2);
01125 tcg_gen_sub_i64(ret, arg1, t0);
01126 tcg_temp_free_i64(t0);
01127 }
01128 }
01129 static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2,
01130 int label_index)
01131 {
01132 TCGv_i64 t0 = tcg_const_i64(arg2);
01133 tcg_gen_brcond_i64(cond, arg1, t0, label_index);
01134 tcg_temp_free_i64(t0);
01135 }
01136
01137 static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01138 {
01139 TCGv_i64 t0 = tcg_const_i64(arg2);
01140 tcg_gen_mul_i64(ret, arg1, t0);
01141 tcg_temp_free_i64(t0);
01142 }
01143
01144
01145
01146
01147
01148 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)
01149 {
01150 #ifdef TCG_TARGET_HAS_ext8s_i32
01151 tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg);
01152 #else
01153 tcg_gen_shli_i32(ret, arg, 24);
01154 tcg_gen_sari_i32(ret, ret, 24);
01155 #endif
01156 }
01157
01158 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
01159 {
01160 #ifdef TCG_TARGET_HAS_ext16s_i32
01161 tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg);
01162 #else
01163 tcg_gen_shli_i32(ret, arg, 16);
01164 tcg_gen_sari_i32(ret, ret, 16);
01165 #endif
01166 }
01167
01168
01169
01170 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
01171 {
01172 tcg_gen_andi_i32(ret, arg, 0xffu);
01173 }
01174
01175 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
01176 {
01177 tcg_gen_andi_i32(ret, arg, 0xffffu);
01178 }
01179
01180
01181 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg)
01182 {
01183 #ifdef TCG_TARGET_HAS_bswap16_i32
01184 tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg);
01185 #else
01186 TCGv_i32 t0, t1;
01187 t0 = tcg_temp_new_i32();
01188 t1 = tcg_temp_new_i32();
01189
01190 tcg_gen_shri_i32(t0, arg, 8);
01191 tcg_gen_andi_i32(t1, arg, 0x000000ff);
01192 tcg_gen_shli_i32(t1, t1, 8);
01193 tcg_gen_or_i32(ret, t0, t1);
01194 tcg_temp_free_i32(t0);
01195 tcg_temp_free_i32(t1);
01196 #endif
01197 }
01198
01199 static inline void tcg_gen_bswap_i32(TCGv_i32 ret, TCGv_i32 arg)
01200 {
01201 #ifdef TCG_TARGET_HAS_bswap_i32
01202 tcg_gen_op2_i32(INDEX_op_bswap_i32, ret, arg);
01203 #else
01204 TCGv_i32 t0, t1;
01205 t0 = tcg_temp_new_i32();
01206 t1 = tcg_temp_new_i32();
01207
01208 tcg_gen_shli_i32(t0, arg, 24);
01209
01210 tcg_gen_andi_i32(t1, arg, 0x0000ff00);
01211 tcg_gen_shli_i32(t1, t1, 8);
01212 tcg_gen_or_i32(t0, t0, t1);
01213
01214 tcg_gen_shri_i32(t1, arg, 8);
01215 tcg_gen_andi_i32(t1, t1, 0x0000ff00);
01216 tcg_gen_or_i32(t0, t0, t1);
01217
01218 tcg_gen_shri_i32(t1, arg, 24);
01219 tcg_gen_or_i32(ret, t0, t1);
01220 tcg_temp_free_i32(t0);
01221 tcg_temp_free_i32(t1);
01222 #endif
01223 }
01224
01225 #if TCG_TARGET_REG_BITS == 32
01226 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
01227 {
01228 tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01229 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01230 }
01231
01232 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
01233 {
01234 tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01235 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01236 }
01237
01238 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
01239 {
01240 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01241 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01242 }
01243
01244 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
01245 {
01246 tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01247 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01248 }
01249
01250 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
01251 {
01252 tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01253 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01254 }
01255
01256 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
01257 {
01258 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
01259 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01260 }
01261
01262 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
01263 {
01264 tcg_gen_mov_i32(ret, TCGV_LOW(arg));
01265 }
01266
01267 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
01268 {
01269 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
01270 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01271 }
01272
01273 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
01274 {
01275 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
01276 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01277 }
01278
01279 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
01280 {
01281 TCGv_i32 t0, t1;
01282 t0 = tcg_temp_new_i32();
01283 t1 = tcg_temp_new_i32();
01284
01285 tcg_gen_bswap_i32(t0, TCGV_LOW(arg));
01286 tcg_gen_bswap_i32(t1, TCGV_HIGH(arg));
01287 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
01288 tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
01289 tcg_temp_free_i32(t0);
01290 tcg_temp_free_i32(t1);
01291 }
01292 #else
01293
01294 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
01295 {
01296 #ifdef TCG_TARGET_HAS_ext8s_i64
01297 tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg);
01298 #else
01299 tcg_gen_shli_i64(ret, arg, 56);
01300 tcg_gen_sari_i64(ret, ret, 56);
01301 #endif
01302 }
01303
01304 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
01305 {
01306 #ifdef TCG_TARGET_HAS_ext16s_i64
01307 tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg);
01308 #else
01309 tcg_gen_shli_i64(ret, arg, 48);
01310 tcg_gen_sari_i64(ret, ret, 48);
01311 #endif
01312 }
01313
01314 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
01315 {
01316 #ifdef TCG_TARGET_HAS_ext32s_i64
01317 tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg);
01318 #else
01319 tcg_gen_shli_i64(ret, arg, 32);
01320 tcg_gen_sari_i64(ret, ret, 32);
01321 #endif
01322 }
01323
01324 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
01325 {
01326 tcg_gen_andi_i64(ret, arg, 0xffu);
01327 }
01328
01329 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
01330 {
01331 tcg_gen_andi_i64(ret, arg, 0xffffu);
01332 }
01333
01334 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
01335 {
01336 tcg_gen_andi_i64(ret, arg, 0xffffffffu);
01337 }
01338
01339
01340
01341 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
01342 {
01343 tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
01344 }
01345
01346
01347
01348 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
01349 {
01350 tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu);
01351 }
01352
01353
01354
01355 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
01356 {
01357 tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
01358 }
01359
01360 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
01361 {
01362 #ifdef TCG_TARGET_HAS_bswap_i64
01363 tcg_gen_op2_i64(INDEX_op_bswap_i64, ret, arg);
01364 #else
01365 TCGv_i32 t0, t1;
01366 t0 = tcg_temp_new_i32();
01367 t1 = tcg_temp_new_i32();
01368
01369 tcg_gen_shli_i64(t0, arg, 56);
01370
01371 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
01372 tcg_gen_shli_i64(t1, t1, 40);
01373 tcg_gen_or_i64(t0, t0, t1);
01374
01375 tcg_gen_andi_i64(t1, arg, 0x00ff0000);
01376 tcg_gen_shli_i64(t1, t1, 24);
01377 tcg_gen_or_i64(t0, t0, t1);
01378
01379 tcg_gen_andi_i64(t1, arg, 0xff000000);
01380 tcg_gen_shli_i64(t1, t1, 8);
01381 tcg_gen_or_i64(t0, t0, t1);
01382
01383 tcg_gen_shri_i64(t1, arg, 8);
01384 tcg_gen_andi_i64(t1, t1, 0xff000000);
01385 tcg_gen_or_i64(t0, t0, t1);
01386
01387 tcg_gen_shri_i64(t1, arg, 24);
01388 tcg_gen_andi_i64(t1, t1, 0x00ff0000);
01389 tcg_gen_or_i64(t0, t0, t1);
01390
01391 tcg_gen_shri_i64(t1, arg, 40);
01392 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
01393 tcg_gen_or_i64(t0, t0, t1);
01394
01395 tcg_gen_shri_i64(t1, arg, 56);
01396 tcg_gen_or_i64(ret, t0, t1);
01397 tcg_temp_free_i32(t0);
01398 tcg_temp_free_i32(t1);
01399 #endif
01400 }
01401
01402 #endif
01403
01404 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
01405 {
01406 #ifdef TCG_TARGET_HAS_neg_i32
01407 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
01408 #else
01409 TCGv_i32 t0 = tcg_const_i32(0);
01410 tcg_gen_sub_i32(ret, t0, arg);
01411 tcg_temp_free_i32(t0);
01412 #endif
01413 }
01414
01415 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
01416 {
01417 #ifdef TCG_TARGET_HAS_neg_i64
01418 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
01419 #else
01420 TCGv_i64 t0 = tcg_const_i64(0);
01421 tcg_gen_sub_i64(ret, t0, arg);
01422 tcg_temp_free_i64(t0);
01423 #endif
01424 }
01425
01426 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
01427 {
01428 tcg_gen_xori_i32(ret, arg, -1);
01429 }
01430
01431 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
01432 {
01433 tcg_gen_xori_i64(ret, arg, -1);
01434 }
01435
01436 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
01437 {
01438 tcg_gen_op1_i32(INDEX_op_discard, arg);
01439 }
01440
01441 #if TCG_TARGET_REG_BITS == 32
01442 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
01443 {
01444 tcg_gen_discard_i32(TCGV_LOW(arg));
01445 tcg_gen_discard_i32(TCGV_HIGH(arg));
01446 }
01447 #else
01448 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
01449 {
01450 tcg_gen_op1_i64(INDEX_op_discard, arg);
01451 }
01452 #endif
01453
01454 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high)
01455 {
01456 #if TCG_TARGET_REG_BITS == 32
01457 tcg_gen_mov_i32(TCGV_LOW(dest), low);
01458 tcg_gen_mov_i32(TCGV_HIGH(dest), high);
01459 #else
01460 TCGv_i64 tmp = tcg_temp_new_i64();
01461
01462
01463 tcg_gen_extu_i32_i64(tmp, high);
01464 tcg_gen_shli_i64(tmp, tmp, 32);
01465 tcg_gen_extu_i32_i64(dest, low);
01466 tcg_gen_or_i64(dest, dest, tmp);
01467 tcg_temp_free_i64(tmp);
01468 #endif
01469 }
01470
01471 static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high)
01472 {
01473 #if TCG_TARGET_REG_BITS == 32
01474 tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
01475 #else
01476 TCGv_i64 tmp = tcg_temp_new_i64();
01477 tcg_gen_ext32u_i64(dest, low);
01478 tcg_gen_shli_i64(tmp, high, 32);
01479 tcg_gen_or_i64(dest, dest, tmp);
01480 tcg_temp_free_i64(tmp);
01481 #endif
01482 }
01483
01484 static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01485 {
01486 TCGv_i32 t0;
01487 t0 = tcg_temp_new_i32();
01488 tcg_gen_not_i32(t0, arg2);
01489 tcg_gen_and_i32(ret, arg1, t0);
01490 tcg_temp_free_i32(t0);
01491 }
01492
01493 static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01494 {
01495 TCGv_i64 t0;
01496 t0 = tcg_temp_new_i64();
01497 tcg_gen_not_i64(t0, arg2);
01498 tcg_gen_and_i64(ret, arg1, t0);
01499 tcg_temp_free_i64(t0);
01500 }
01501
01502 static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01503 {
01504 TCGv_i32 t0;
01505 t0 = tcg_temp_new_i32();
01506 tcg_gen_xor_i32(t0, arg1, arg2);
01507 tcg_gen_not_i32(ret, t0);
01508 tcg_temp_free_i32(t0);
01509 }
01510
01511 static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01512 {
01513 TCGv_i64 t0;
01514 t0 = tcg_temp_new_i64();
01515 tcg_gen_xor_i64(t0, arg1, arg2);
01516 tcg_gen_not_i64(ret, t0);
01517 tcg_temp_free_i64(t0);
01518 }
01519
01520 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01521 {
01522 TCGv_i32 t0;
01523 t0 = tcg_temp_new_i32();
01524 tcg_gen_and_i32(t0, arg1, arg2);
01525 tcg_gen_not_i32(ret, t0);
01526 tcg_temp_free_i32(t0);
01527 }
01528
01529 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01530 {
01531 TCGv_i64 t0;
01532 t0 = tcg_temp_new_i64();
01533 tcg_gen_and_i64(t0, arg1, arg2);
01534 tcg_gen_not_i64(ret, t0);
01535 tcg_temp_free_i64(t0);
01536 }
01537
01538 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01539 {
01540 TCGv_i32 t0;
01541 t0 = tcg_temp_new_i32();
01542 tcg_gen_or_i32(t0, arg1, arg2);
01543 tcg_gen_not_i32(ret, t0);
01544 tcg_temp_free_i32(t0);
01545 }
01546
01547 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01548 {
01549 TCGv_i64 t0;
01550 t0 = tcg_temp_new_i64();
01551 tcg_gen_or_i64(t0, arg1, arg2);
01552 tcg_gen_not_i64(ret, t0);
01553 tcg_temp_free_i64(t0);
01554 }
01555
01556 static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01557 {
01558 TCGv_i32 t0;
01559 t0 = tcg_temp_new_i32();
01560 tcg_gen_not_i32(t0, arg2);
01561 tcg_gen_or_i32(ret, arg1, t0);
01562 tcg_temp_free_i32(t0);
01563 }
01564
01565 static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01566 {
01567 TCGv_i64 t0;
01568 t0 = tcg_temp_new_i64();
01569 tcg_gen_not_i64(t0, arg2);
01570 tcg_gen_or_i64(ret, arg1, t0);
01571 tcg_temp_free_i64(t0);
01572 }
01573
01574 static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01575 {
01576 TCGv_i32 t0, t1;
01577
01578 t0 = tcg_temp_new_i32();
01579 t1 = tcg_temp_new_i32();
01580 tcg_gen_shl_i32(t0, arg1, arg2);
01581 tcg_gen_subfi_i32(t1, 32, arg2);
01582 tcg_gen_shr_i32(t1, arg1, t1);
01583 tcg_gen_or_i32(ret, t0, t1);
01584 tcg_temp_free_i32(t0);
01585 tcg_temp_free_i32(t1);
01586 }
01587
01588 static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01589 {
01590 TCGv_i64 t0, t1;
01591
01592 t0 = tcg_temp_new_i64();
01593 t1 = tcg_temp_new_i64();
01594 tcg_gen_shl_i64(t0, arg1, arg2);
01595 tcg_gen_subfi_i64(t1, 64, arg2);
01596 tcg_gen_shr_i64(t1, arg1, t1);
01597 tcg_gen_or_i64(ret, t0, t1);
01598 tcg_temp_free_i64(t0);
01599 tcg_temp_free_i64(t1);
01600 }
01601
01602 static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
01603 {
01604
01605 if (arg2 == 0) {
01606 tcg_gen_mov_i32(ret, arg1);
01607 } else {
01608 TCGv_i32 t0, t1;
01609 t0 = tcg_temp_new_i32();
01610 t1 = tcg_temp_new_i32();
01611 tcg_gen_shli_i32(t0, arg1, arg2);
01612 tcg_gen_shri_i32(t1, arg1, 32 - arg2);
01613 tcg_gen_or_i32(ret, t0, t1);
01614 tcg_temp_free_i32(t0);
01615 tcg_temp_free_i32(t1);
01616 }
01617 }
01618
01619 static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01620 {
01621
01622 if (arg2 == 0) {
01623 tcg_gen_mov_i64(ret, arg1);
01624 } else {
01625 TCGv_i64 t0, t1;
01626 t0 = tcg_temp_new_i64();
01627 t1 = tcg_temp_new_i64();
01628 tcg_gen_shli_i64(t0, arg1, arg2);
01629 tcg_gen_shri_i64(t1, arg1, 64 - arg2);
01630 tcg_gen_or_i64(ret, t0, t1);
01631 tcg_temp_free_i64(t0);
01632 tcg_temp_free_i64(t1);
01633 }
01634 }
01635
01636 static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
01637 {
01638 TCGv_i32 t0, t1;
01639
01640 t0 = tcg_temp_new_i32();
01641 t1 = tcg_temp_new_i32();
01642 tcg_gen_shr_i32(t0, arg1, arg2);
01643 tcg_gen_subfi_i32(t1, 32, arg2);
01644 tcg_gen_shl_i32(t1, arg1, t1);
01645 tcg_gen_or_i32(ret, t0, t1);
01646 tcg_temp_free_i32(t0);
01647 tcg_temp_free_i32(t1);
01648 }
01649
01650 static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
01651 {
01652 TCGv_i64 t0, t1;
01653
01654 t0 = tcg_temp_new_i64();
01655 t1 = tcg_temp_new_i64();
01656 tcg_gen_shl_i64(t0, arg1, arg2);
01657 tcg_gen_subfi_i64(t1, 64, arg2);
01658 tcg_gen_shl_i64(t1, arg1, t1);
01659 tcg_gen_or_i64(ret, t0, t1);
01660 tcg_temp_free_i64(t0);
01661 tcg_temp_free_i64(t1);
01662 }
01663
01664 static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
01665 {
01666
01667 if (arg2 == 0) {
01668 tcg_gen_mov_i32(ret, arg1);
01669 } else {
01670 tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
01671 }
01672 }
01673
01674 static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
01675 {
01676
01677 if (arg2 == 0) {
01678 tcg_gen_mov_i64(ret, arg1);
01679 } else {
01680 tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
01681 }
01682 }
01683
01684
01685
01686
01687 #ifndef TARGET_LONG_BITS
01688 #error must include QEMU headers
01689 #endif
01690
01691 #if TARGET_LONG_BITS == 32
01692 #define TCGv TCGv_i32
01693 #define tcg_temp_new() tcg_temp_new_i32()
01694 #define tcg_global_reg_new tcg_global_reg_new_i32
01695 #define tcg_global_mem_new tcg_global_mem_new_i32
01696 #define tcg_temp_local_new() tcg_temp_local_new_i32()
01697 #define tcg_temp_free tcg_temp_free_i32
01698 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
01699 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
01700 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
01701 #define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
01702 #else
01703 #define TCGv TCGv_i64
01704 #define tcg_temp_new() tcg_temp_new_i64()
01705 #define tcg_global_reg_new tcg_global_reg_new_i64
01706 #define tcg_global_mem_new tcg_global_mem_new_i64
01707 #define tcg_temp_local_new() tcg_temp_local_new_i64()
01708 #define tcg_temp_free tcg_temp_free_i64
01709 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
01710 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
01711 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
01712 #define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
01713 #endif
01714
01715
01716 static inline void tcg_gen_debug_insn_start(uint64_t pc)
01717 {
01718
01719 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
01720 tcg_gen_op2ii(INDEX_op_debug_insn_start,
01721 (uint32_t)(pc), (uint32_t)(pc >> 32));
01722 #else
01723 tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
01724 #endif
01725 }
01726
01727 static inline void tcg_gen_exit_tb(tcg_target_long val)
01728 {
01729 tcg_gen_op1i(INDEX_op_exit_tb, val);
01730 }
01731
01732 static inline void tcg_gen_goto_tb(int idx)
01733 {
01734 tcg_gen_op1i(INDEX_op_goto_tb, idx);
01735 }
01736
01737 #if TCG_TARGET_REG_BITS == 32
01738 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
01739 {
01740 #if TARGET_LONG_BITS == 32
01741 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
01742 #else
01743 tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr),
01744 TCGV_HIGH(addr), mem_index);
01745 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01746 #endif
01747 }
01748
01749 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
01750 {
01751 #if TARGET_LONG_BITS == 32
01752 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
01753 #else
01754 tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr),
01755 TCGV_HIGH(addr), mem_index);
01756 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01757 #endif
01758 }
01759
01760 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
01761 {
01762 #if TARGET_LONG_BITS == 32
01763 tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index);
01764 #else
01765 tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr),
01766 TCGV_HIGH(addr), mem_index);
01767 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01768 #endif
01769 }
01770
01771 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
01772 {
01773 #if TARGET_LONG_BITS == 32
01774 tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index);
01775 #else
01776 tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr),
01777 TCGV_HIGH(addr), mem_index);
01778 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01779 #endif
01780 }
01781
01782 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
01783 {
01784 #if TARGET_LONG_BITS == 32
01785 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
01786 #else
01787 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
01788 TCGV_HIGH(addr), mem_index);
01789 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
01790 #endif
01791 }
01792
01793 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
01794 {
01795 #if TARGET_LONG_BITS == 32
01796 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
01797 #else
01798 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
01799 TCGV_HIGH(addr), mem_index);
01800 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
01801 #endif
01802 }
01803
01804 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
01805 {
01806 #if TARGET_LONG_BITS == 32
01807 tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index);
01808 #else
01809 tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret),
01810 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
01811 #endif
01812 }
01813
01814 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
01815 {
01816 #if TARGET_LONG_BITS == 32
01817 tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index);
01818 #else
01819 tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr),
01820 TCGV_HIGH(addr), mem_index);
01821 #endif
01822 }
01823
01824 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
01825 {
01826 #if TARGET_LONG_BITS == 32
01827 tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index);
01828 #else
01829 tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr),
01830 TCGV_HIGH(addr), mem_index);
01831 #endif
01832 }
01833
01834 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
01835 {
01836 #if TARGET_LONG_BITS == 32
01837 tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index);
01838 #else
01839 tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr),
01840 TCGV_HIGH(addr), mem_index);
01841 #endif
01842 }
01843
01844 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
01845 {
01846 #if TARGET_LONG_BITS == 32
01847 tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr,
01848 mem_index);
01849 #else
01850 tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg),
01851 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
01852 #endif
01853 }
01854
01855 #define tcg_gen_ld_ptr tcg_gen_ld_i32
01856 #define tcg_gen_discard_ptr tcg_gen_discard_i32
01857
01858 #else
01859
01860 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
01861 {
01862 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index);
01863 }
01864
01865 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
01866 {
01867 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index);
01868 }
01869
01870 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
01871 {
01872 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index);
01873 }
01874
01875 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
01876 {
01877 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index);
01878 }
01879
01880 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
01881 {
01882 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
01883 }
01884
01885 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
01886 {
01887 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
01888 }
01889
01890 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
01891 {
01892 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index);
01893 }
01894
01895 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
01896 {
01897 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index);
01898 }
01899
01900 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
01901 {
01902 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index);
01903 }
01904
01905 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
01906 {
01907 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index);
01908 }
01909
01910 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
01911 {
01912 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
01913 }
01914
01915 #define tcg_gen_ld_ptr tcg_gen_ld_i64
01916 #define tcg_gen_discard_ptr tcg_gen_discard_i64
01917
01918 #endif
01919
01920 #if TARGET_LONG_BITS == 64
01921 #define TCG_TYPE_TL TCG_TYPE_I64
01922 #define tcg_gen_movi_tl tcg_gen_movi_i64
01923 #define tcg_gen_mov_tl tcg_gen_mov_i64
01924 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
01925 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
01926 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
01927 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
01928 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
01929 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
01930 #define tcg_gen_ld_tl tcg_gen_ld_i64
01931 #define tcg_gen_st8_tl tcg_gen_st8_i64
01932 #define tcg_gen_st16_tl tcg_gen_st16_i64
01933 #define tcg_gen_st32_tl tcg_gen_st32_i64
01934 #define tcg_gen_st_tl tcg_gen_st_i64
01935 #define tcg_gen_add_tl tcg_gen_add_i64
01936 #define tcg_gen_addi_tl tcg_gen_addi_i64
01937 #define tcg_gen_sub_tl tcg_gen_sub_i64
01938 #define tcg_gen_neg_tl tcg_gen_neg_i64
01939 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
01940 #define tcg_gen_subi_tl tcg_gen_subi_i64
01941 #define tcg_gen_and_tl tcg_gen_and_i64
01942 #define tcg_gen_andi_tl tcg_gen_andi_i64
01943 #define tcg_gen_or_tl tcg_gen_or_i64
01944 #define tcg_gen_ori_tl tcg_gen_ori_i64
01945 #define tcg_gen_xor_tl tcg_gen_xor_i64
01946 #define tcg_gen_xori_tl tcg_gen_xori_i64
01947 #define tcg_gen_not_tl tcg_gen_not_i64
01948 #define tcg_gen_shl_tl tcg_gen_shl_i64
01949 #define tcg_gen_shli_tl tcg_gen_shli_i64
01950 #define tcg_gen_shr_tl tcg_gen_shr_i64
01951 #define tcg_gen_shri_tl tcg_gen_shri_i64
01952 #define tcg_gen_sar_tl tcg_gen_sar_i64
01953 #define tcg_gen_sari_tl tcg_gen_sari_i64
01954 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
01955 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
01956 #define tcg_gen_mul_tl tcg_gen_mul_i64
01957 #define tcg_gen_muli_tl tcg_gen_muli_i64
01958 #define tcg_gen_discard_tl tcg_gen_discard_i64
01959 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
01960 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
01961 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
01962 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
01963 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
01964 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
01965 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
01966 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
01967 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
01968 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
01969 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
01970 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
01971 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
01972 #define tcg_gen_andc_tl tcg_gen_andc_i64
01973 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
01974 #define tcg_gen_nand_tl tcg_gen_nand_i64
01975 #define tcg_gen_nor_tl tcg_gen_nor_i64
01976 #define tcg_gen_orc_tl tcg_gen_orc_i64
01977 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
01978 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
01979 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
01980 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
01981 #define tcg_const_tl tcg_const_i64
01982 #define tcg_const_local_tl tcg_const_local_i64
01983 #else
01984 #define TCG_TYPE_TL TCG_TYPE_I32
01985 #define tcg_gen_movi_tl tcg_gen_movi_i32
01986 #define tcg_gen_mov_tl tcg_gen_mov_i32
01987 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
01988 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
01989 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
01990 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
01991 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
01992 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
01993 #define tcg_gen_ld_tl tcg_gen_ld_i32
01994 #define tcg_gen_st8_tl tcg_gen_st8_i32
01995 #define tcg_gen_st16_tl tcg_gen_st16_i32
01996 #define tcg_gen_st32_tl tcg_gen_st_i32
01997 #define tcg_gen_st_tl tcg_gen_st_i32
01998 #define tcg_gen_add_tl tcg_gen_add_i32
01999 #define tcg_gen_addi_tl tcg_gen_addi_i32
02000 #define tcg_gen_sub_tl tcg_gen_sub_i32
02001 #define tcg_gen_neg_tl tcg_gen_neg_i32
02002 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
02003 #define tcg_gen_subi_tl tcg_gen_subi_i32
02004 #define tcg_gen_and_tl tcg_gen_and_i32
02005 #define tcg_gen_andi_tl tcg_gen_andi_i32
02006 #define tcg_gen_or_tl tcg_gen_or_i32
02007 #define tcg_gen_ori_tl tcg_gen_ori_i32
02008 #define tcg_gen_xor_tl tcg_gen_xor_i32
02009 #define tcg_gen_xori_tl tcg_gen_xori_i32
02010 #define tcg_gen_not_tl tcg_gen_not_i32
02011 #define tcg_gen_shl_tl tcg_gen_shl_i32
02012 #define tcg_gen_shli_tl tcg_gen_shli_i32
02013 #define tcg_gen_shr_tl tcg_gen_shr_i32
02014 #define tcg_gen_shri_tl tcg_gen_shri_i32
02015 #define tcg_gen_sar_tl tcg_gen_sar_i32
02016 #define tcg_gen_sari_tl tcg_gen_sari_i32
02017 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
02018 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
02019 #define tcg_gen_mul_tl tcg_gen_mul_i32
02020 #define tcg_gen_muli_tl tcg_gen_muli_i32
02021 #define tcg_gen_discard_tl tcg_gen_discard_i32
02022 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
02023 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
02024 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
02025 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
02026 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
02027 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
02028 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
02029 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
02030 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
02031 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
02032 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
02033 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
02034 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
02035 #define tcg_gen_andc_tl tcg_gen_andc_i32
02036 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
02037 #define tcg_gen_nand_tl tcg_gen_nand_i32
02038 #define tcg_gen_nor_tl tcg_gen_nor_i32
02039 #define tcg_gen_orc_tl tcg_gen_orc_i32
02040 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
02041 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
02042 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
02043 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
02044 #define tcg_const_tl tcg_const_i32
02045 #define tcg_const_local_tl tcg_const_local_i32
02046 #endif
02047
02048 #if TCG_TARGET_REG_BITS == 32
02049 #define tcg_gen_add_ptr tcg_gen_add_i32
02050 #define tcg_gen_addi_ptr tcg_gen_addi_i32
02051 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
02052 #else
02053 #define tcg_gen_add_ptr tcg_gen_add_i64
02054 #define tcg_gen_addi_ptr tcg_gen_addi_i64
02055 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
02056 #endif