00001 #ifndef HW_MCF_H
00002 #define HW_MCF_H
00003
00004
00005
00006 uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr);
00007 void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val);
00008 void *mcf_uart_init(qemu_irq irq, CharDriverState *chr);
00009 void mcf_uart_mm_init(target_phys_addr_t base, qemu_irq irq,
00010 CharDriverState *chr);
00011
00012
00013 qemu_irq *mcf_intc_init(target_phys_addr_t base, CPUState *env);
00014
00015
00016 void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq);
00017
00018
00019 qemu_irq *mcf5206_init(uint32_t base, CPUState *env);
00020
00021 #endif