00001 /* 00002 * technology.h - 0.18 um technology process parameters. 00003 * The process parameters are obtained from MOSIS web site (http://www.mosis.org) 00004 * and a part of data are obtained from CACTI. 00005 * 00006 * This file is a part of the PowerAnalyzer tool suite written by 00007 * Nam Sung Kim as a part of the PowerAnalyzer Project. 00008 * 00009 * The tool suite is currently maintained by Nam Sung Kim. 00010 * 00011 * Copyright (C) 2001 by Nam Sung Kim 00012 * 00013 * This source file is distributed "as is" in the hope that it will be 00014 * useful. The tool set comes with no warranty, and no author or 00015 * distributor accepts any responsibility for the consequences of its 00016 * use. 00017 * 00018 * Everyone is granted permission to copy, modify and redistribute 00019 * this tool set under the following conditions: 00020 * 00021 * This source code is distributed for non-commercial use only. 00022 * Please contact the maintainer for restrictions applying to 00023 * commercial use. 00024 * 00025 * Permission is granted to anyone to make or distribute copies 00026 * of this source code, either as received or modified, in any 00027 * medium, provided that all copyright notices, permission and 00028 * nonwarranty notices are preserved, and that the distributor 00029 * grants the recipient permission for further redistribution as 00030 * permitted by this document. 00031 * 00032 * Permission is granted to distribute this file in compiled 00033 * or executable form under the same conditions that apply for 00034 * source code, provided that either: 00035 * 00036 * A. it is accompanied by the corresponding machine-readable 00037 * source code, 00038 * B. it is accompanied by a written offer, with no time limit, 00039 * to give anyone a machine-readable copy of the corresponding 00040 * source code in return for reimbursement of the cost of 00041 * distribution. This written offer must permit verbatim 00042 * duplication by anyone, or 00043 * C. it is distributed by someone who received only the 00044 * executable form, and is accompanied by a copy of the 00045 * written offer of source code that they received concurrently. 00046 * 00047 * In other words, you are welcome to use, share and improve this 00048 * source file. You are forbidden to forbid anyone else to use, share 00049 * and improve what you give them. 00050 */ 00051 00052 #ifndef TECHNOLOGY_H 00053 #define TECHNOLOGY_H 00054 /* from MOSIS parametric test result for TSMC 0.18um technology */ 00055 /* Ld : LINT in BSIM model */ 00056 /* Wd : WINT in BSIM model */ 00057 /* Cja0 : CJ in BSIM model */ 00058 /* Cjp0 : CJSW in BSIM model */ 00059 /* Vbi : PB in BSIM model */ 00060 00061 #define tech_180nm 00062 00063 #ifdef tech_180nm 00064 #define sgwireC (414.0E-18) /* F/um */ 00065 #define gwireC (440.0E-18) /* F/um */ 00066 #define sgwireR (96.0E-3) /* Ohm/um */ 00067 #define gwireR (20.0E-3) /* Ohm/um */ 00068 #define nVth (0.3) /* minimum transistor NMOS Vth */ 00069 #define pVth (0.34) /* minimum transistor PMOS Vth */ 00070 #define Vth (nVth / 2. + pVth / 2.) 00071 #define Ltech (0.18) /* min technology channel width in um */ 00072 #define Ld (0.007631769) /* channel length overlap in um */ 00073 #define Leff (Ltech - 2. * Ld) /* min effective channel legth */ 00074 #define Wtech (0.27) /* min technology channel width in um */ 00075 #define Wd (0.001798714) /* channel width overlap in um */ 00076 #define Weff (Wtech - 2. *Wd) /* min effective channel width in um */ 00077 #define eox (3.9 * 8.85E-18) /* permiability of Si in F/um */ 00078 #define tox (4.1E-3) /* SiO2 thinkness in um */ 00079 #define pmobility (84.78) /* p-type mobility */ 00080 #define nmobility (409.16) /* n-type mobility */ 00081 #define beta (nmobility / pmobility) 00082 #define Cox (eox / tox) 00083 #define nIdss (546E-6) /* NMOS saturation current A/um */ 00084 #define pIdss (256E-6) /* PMOS saturation current A/um */ 00085 #define nRc (11.3) /* n-active contact resistance */ 00086 #define pRc (11.8) /* p-active contact resistance */ 00087 #ifndef Vdd 00088 #define Vdd (1.8) /* nominal supply voltage */ 00089 #endif 00090 #define Vio (3.3) /* I/O circuitry supply voltage */ 00091 #define nVbi (0.7420424) /* built in potential in V */ 00092 #define pVbi (0.8637545) 00093 #define nCja0 (0.9868856E-15) /* junction capacitance in F/um^2 */ 00094 #define pCja0 (1.181916E-15) 00095 #define nCjp0 (0.2132647E-15) /* side wall capacitance in F/um */ 00096 #define pCjp0 (0.1716535E-15) 00097 #define RKp (0.82) /* Rent constant for microprocessor */ 00098 #define Rp (0.45) /* Rent exponent for microprocessor */ 00099 #define packageCeff (3.548E-12) /* PAD plate from ARTISAN TSMC 0.18um */ 00100 #define interspace (3.0 * Ltech) 00101 #define interwidth (2.0 * Ltech) 00102 #define interpitch (interspace + interwidth) 00103 #define NCH 1 00104 #define PCH 0 00105 #define NMOS 1 00106 #define PMOS 0 00107 00108 double 00109 estimate_trCeff( 00110 double k /* transistor sizing ratio */); 00111 00112 double 00113 estimate_sgwireCeff( 00114 double length); 00115 00116 double 00117 estimate_gwireCeff( 00118 double length); 00119 00120 double 00121 estimate_sgwireReff( 00122 double length); 00123 00124 double 00125 estimate_gwireReff( 00126 double length); 00127 00128 double 00129 estimate_gininvCeff( 00130 double k /* transistor sizing ratio */); 00131 00132 double 00133 estimate_ginnandCeff( 00134 double k, /* transistor sizing ratio */ 00135 double fi /* average fanin */); 00136 00137 double 00138 estimate_ginnorCeff( 00139 double k /* transistor sizing ratio */); 00140 00141 double 00142 estimate_sdCeff( 00143 int CH, /* channel type */ 00144 double k /* transistor sizing ratio */); 00145 00146 double 00147 estimate_sdinvCeff( 00148 double k /* transistor sizing ratio */); 00149 00150 double 00151 estimate_sdnandCeff( 00152 double k, /* transistor sizing ratio */ 00153 double fi /* average fanin*/); 00154 00155 double 00156 estimate_sdnorCeff( 00157 double k, /* transistor sizing ratio */ 00158 double fi /* average fanin */); 00159 00160 double 00161 estimate_gm( 00162 int CH /* channel type*/); 00163 00164 double 00165 estimate_trReff( 00166 int CH, /* channel type*/ 00167 double k /* transistor sizing ratio */); 00168 00169 double 00170 estimate_cReff( 00171 double k /* transistor sizing ratio */); 00172 00173 double 00174 estimate_trinvReff( 00175 double k /* transistor sizing ratio */); 00176 00177 double 00178 estimate_goutinvReff( 00179 double k /* transistor sizing ratio */); 00180 00181 #ifdef tech_130nm 00182 #define sgwireC 343.0E-18 /* aF/um */ 00183 #define gwireC 370.0E-18 /* aF/um */ 00184 #define sgwireR 168.0E-3 /* Ohm/um */ 00185 #define gwireR 35.0E-3 /* Ohm/um */ 00186 #endif 00187 00188 #ifdef tech_100nm 00189 #define sgwireC 314.0E-18 /* aF/um */ 00190 #define gwireC 335.0E-18 /* aF/um */ 00191 #define sgwireR 260.0E-3 /* Ohm/um */ 00192 #define gwireR 54.0E-3 /* Ohm/um */ 00193 #endif 00194 00195 #ifdef tech_70nm 00196 #define sgwireC 307.0E-18 /* aF/um */ 00197 #define gwireC 312.0E-18 /* aF/um */ 00198 #define sgwireR 340.0E-3 /* Ohm/um */ 00199 #define gwireR 82.0E-3 /* Ohm/um */ 00200 #endif 00201 00202 #ifdef tech_50nm 00203 #define sgwireC 296.0E-18 /* aF/um */ 00204 #define gwireC 296.0E-18 /* aF/um */ 00205 #define sgwireR 600.0E-3 /* Ohm/um */ 00206 #define gwireR 150.0E-3 /* Ohm/um */ 00207 #endif 00208 00209 /* CMOS 0.18um model parameters - directly from Appendix II of tech report */ 00210 #define Cndiffarea 0.137e-15 /* F/um2 at 1.5V */ 00211 #define Cpdiffarea 0.343e-15 /* F/um2 at 1.5V */ 00212 #define Cndiffside 0.275e-15 /* F/um at 1.5V */ 00213 #define Cpdiffside 0.275e-15 /* F/um at 1.5V */ 00214 #define Cndiffovlp 0.138e-15 /* F/um at 1.5V */ 00215 #define Cpdiffovlp 0.138e-15 /* F/um at 1.5V */ 00216 #define Cnoxideovlp 0.263e-15 /* F/um assuming 25% Miller effect */ 00217 #define Cpoxideovlp 0.338e-15 /* F/um assuming 25% Miller effect */ 00218 #define Cgate 1.95e-15 /* F/um2 */ 00219 #define Cgatepass 1.45e-15 /* F/um2 */ 00220 #define Cpolywire 0.25e-15 /* F/um */ 00221 #define Cmetal 275e-18 /* */ 00222 00223 #define Rnchannelstatic 25800 /* ohms*um of channel width */ 00224 #define Rpchannelstatic 61200 /* ohms*um of channel width */ 00225 #define Rnchannelon 8751 00226 #define Rpchannelon 20160 00227 #define Rmetal 48e-3 00228 #endif 00229 00230 /* panalyzer constant definition for 0.18um process */ 00231 00232 /* SPICE model parameters : 00233 * Vbi PB 00234 * Cja CJ 00235 * Cjp CJSW */ 00236 #endif /* TECHNOLOGY_H */