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sst/core/techModels/libsim-panalyzer/microstrip.h

00001 /* Parasitic Cap, Resistance for metal lines  
00002  */
00003 
00004 /* typical 4 layer PCB parameters 
00005 ** Courtesy of www.icd.com.au/layere4.html
00006 */
00007 #define MICROSTRIP_ER 4.7 
00008 #define MICROSTRIP_H 16 
00009 #define MICROSTRIP_T 0.7
00010 #define MICROSTRIP_W 7
00011  
00012 /* Buffer delay for typical buffer load*/
00013 #define BUFFER_DELAY 80 /* ps*/ 
00014 
00015 
00016 typedef struct _microstrip_t {
00017         double dielectric;
00018         double width;
00019         double thickness;
00020         double height;
00021         double length;
00022 } microstrip_t;
00023 
00024 
00025 
00026 double estimate_microstrip_capacitance(microstrip_t * spec);
00027 

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