00001 /* 00002 * cache_panalyzer.h - cache structure power analysis tools for 00003 * il1, il2, dl1, dl2, itlb, dtlb. 00004 * 00005 * This file is a part of the PowerAnalyzer tool suite written by 00006 * Nam Sung Kim as a part of the PowerAnalyzer Project. 00007 * 00008 * The tool suite is currently maintained by Nam Sung Kim. 00009 * 00010 * Copyright (C) 2001 by Nam Sung Kim 00011 * 00012 * This source file is distributed "as is" in the hope that it will be 00013 * useful. The tool set comes with no warranty, and no author or 00014 * distributor accepts any responsibility for the consequences of its 00015 * use. 00016 * 00017 * Everyone is granted permission to copy, modify and redistribute 00018 * this tool set under the following conditions: 00019 * 00020 * This source code is distributed for non-commercial use only. 00021 * Please contact the maintainer for restrictions applying to 00022 * commercial use. 00023 * 00024 * Permission is granted to anyone to make or distribute copies 00025 * of this source code, either as received or modified, in any 00026 * medium, provided that all copyright notices, permission and 00027 * nonwarranty notices are preserved, and that the distributor 00028 * grants the recipient permission for further redistribution as 00029 * permitted by this document. 00030 * 00031 * Permission is granted to distribute this file in compiled 00032 * or executable form under the same conditions that apply for 00033 * source code, provided that either: 00034 * 00035 * A. it is accompanied by the corresponding machine-readable 00036 * source code, 00037 * B. it is accompanied by a written offer, with no time limit, 00038 * to give anyone a machine-readable copy of the corresponding 00039 * source code in return for reimbursement of the cost of 00040 * distribution. This written offer must permit verbatim 00041 * duplication by anyone, or 00042 * C. it is distributed by someone who received only the 00043 * executable form, and is accompanied by a copy of the 00044 * written offer of source code that they received concurrently. 00045 * 00046 * In other words, you are welcome to use, share and improve this 00047 * source file. You are forbidden to forbid anyone else to use, share 00048 * and improve what you give them. 00049 */ 00050 00051 #ifndef CACHE_PANALYZER_H 00052 #define CACHE_PANALYZER_H 00053 00054 #include "cache.h" 00055 #include "stats.h" 00056 #include "panalyzer.h" 00057 #include "memory_panalyzer.h" 00058 00059 /* number of virtual address */ 00060 #define NVA 40 00061 /* number of physicalo address */ 00062 #define NPA 32 00063 00064 /* cache power specification type: 00065 * contain all the info for analyzing cache pdissipation */ 00066 typedef struct _fu_cache_pspec_t { 00067 char *name; /* name */ 00068 fu_pmodel_mode_t pmodel; /* power model mode */ 00069 double opfreq, svolt; /* operating frequency/supply voltage */ 00070 fu_dimension_t *dimension; 00071 00072 unsigned nsets, bsize, assoc; 00073 unsigned nbls, nwls; 00074 unsigned nacycles; /* cache access time in cycles */ 00075 unsigned ntcols, ndcols; 00076 fu_sbank_pspec_t *t_pspec, *d_pspec; /* tag / data array pspecs */ 00077 00078 fu_Ceffs_t *t_Ceffs, *d_Ceffs; /* effective pdissipation capacitances */ 00079 fu_pdissipation_t *pdissipation; /* pdissipation statistics */ 00080 fu_pdissipation_t pmwindow[MaxPMWindows]; /* power monitoring window */ 00081 } fu_cache_pspec_t; 00082 00083 /* create cache panalyzer database 00084 * return an allocated location pointer. 00085 * caution: please deallocate the cache space */ 00086 fu_cache_pspec_t * 00087 create_cache_panalyzer( 00088 char *name, /* cache name */ 00089 fu_pmodel_mode_t pmodel, /* cache power model mode */ 00090 double opfreq, double svolt, /* operating frequency/supply voltage */ 00091 00092 /* n: number of 00093 * nsets: sets, bsize: line or block size, assoc: associativity 00094 * nbls : bitlines in a cache array 00095 * nwls : wordlines in a cache array 00096 * nrwports: read/write. nrports: read. nwports: write ports */ 00097 unsigned nsets, unsigned bsize, unsigned assoc, 00098 unsigned nbls, unsigned nwls, 00099 unsigned nrwports, unsigned nrports, unsigned nwports, 00100 00101 /* switching/internal/lekage effective capacitances of the array */ 00102 double sCeff, double iCeff, double lCeff); 00103 00104 /* cache panalyzer */ 00105 void 00106 cache_panalyzer( 00107 fu_cache_pspec_t *pspec, 00108 fu_mcommand_t mcommand, /* cache command: Read/Write */ 00109 fu_address_t address, /* cache access starting address */ 00110 buffer_t *dbus, /* commnication buffer between sim-outorder / panalyzer */ 00111 unsigned bsize, /* transaction size */ 00112 tick_t now, /* current cycle */ 00113 unsigned lat /* access latency from sim-outorder */); 00114 00115 /* Added for SST */ 00116 double 00117 SSTcache_panalyzer( 00118 fu_cache_pspec_t *pspec, 00119 fu_mcommand_t mcommand, /* cache command: Read/Write */ 00120 fu_address_t address, /* cache access starting address */ 00121 buffer_t *dbus, /* commnication buffer between sim-outorder / panalyzer */ 00122 //unsigned bsize, /* transaction size */ 00123 tick_t now, /* current cycle */ 00124 unsigned lat /* access latency from sim-outorder */); 00125 00126 #endif /* CACHE_PANALYZER_H */