00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048 #ifndef __BASIC_CIRCUIT_H__
00049 #define __BASIC_CIRCUIT_H__
00050
00051 #include "const.h"
00052 #include "cacti_interface.h"
00053
00054 int powers (int base, int n);
00055 bool is_pow2(int64_t val);
00056 uint32_t _log2(uint64_t num);
00057
00058
00059 double logtwo (double x);
00060
00061 double gate_C(
00062 double width,
00063 double wirelength,
00064 bool _is_dram = false,
00065 bool _is_sram = false,
00066 bool _is_wl_tr = false);
00067
00068 double gate_C_pass(
00069 double width,
00070 double wirelength,
00071 bool _is_dram = false,
00072 bool _is_sram = false,
00073 bool _is_wl_tr = false);
00074
00075 double drain_C_(
00076 double width,
00077 int nchannel,
00078 int stack,
00079 int next_arg_thresh_folding_width_or_height_cell,
00080 double fold_dimension,
00081 bool _is_dram = false,
00082 bool _is_sram = false,
00083 bool _is_wl_tr = false);
00084
00085 double tr_R_on(
00086 double width,
00087 int nchannel,
00088 int stack,
00089 bool _is_dram = false,
00090 bool _is_sram = false,
00091 bool _is_wl_tr = false);
00092
00093 double R_to_w(
00094 double res,
00095 int nchannel,
00096 bool _is_dram = false,
00097 bool _is_sram = false,
00098 bool _is_wl_tr = false);
00099
00100 double horowitz (
00101 double inputramptime,
00102 double tf,
00103 double vs1,
00104 double vs2,
00105 int rise);
00106
00107 double pmos_to_nmos_sz_ratio(
00108 bool _is_dram = false,
00109 bool _is_wl_tr = false);
00110
00111 double simplified_nmos_leakage(
00112 double nwidth,
00113 bool _is_dram = false,
00114 bool _is_cell = false,
00115 bool _is_wl_tr = false);
00116
00117 double simplified_pmos_leakage(
00118 double pwidth,
00119 bool _is_dram = false,
00120 bool _is_cell = false,
00121 bool _is_wl_tr = false);
00122
00123
00124 double cmos_Ileak(
00125 double nWidth,
00126 double pWidth,
00127 bool _is_dram = false,
00128 bool _is_cell = false,
00129 bool _is_wl_tr = false);
00130
00131 int logical_effort(
00132 int num_gates_min,
00133 double g,
00134 double F,
00135 double * w_n,
00136 double * w_p,
00137 double C_load,
00138 double p_to_n_sz_ratio,
00139 bool is_dram_,
00140 bool is_wl_tr_,
00141 bool never_max_ = false);
00142
00143 double shortcircuit(
00144 double vt,
00145 double velocity_index,
00146 double c_in,
00147 double c_out,
00148 double w_nmos,
00149 double w_pmos,
00150 double i_on_n,
00151 double i_on_p,
00152 double i_on_n_in,
00153 double i_on_p_in,
00154 double vdd);
00155
00156 double shortcircuit_simple(
00157 double vt,
00158 double velocity_index,
00159 double c_in,
00160 double c_out,
00161 double w_nmos,
00162 double w_pmos,
00163 double i_on_n,
00164 double i_on_p,
00165 double i_on_n_in,
00166 double i_on_p_in,
00167 double vdd);
00168
00169 typedef struct {
00170 int model;
00171 unsigned int n_switch;
00172 unsigned int n_keep_1;
00173 unsigned int n_keep_0;
00174 unsigned int n_clock;
00175 powerDef e_switch;
00176 powerDef e_keep_1;
00177 powerDef e_keep_0;
00178 powerDef e_clock;
00179
00180 } DFF;
00181
00182 class DFFCell
00183 {
00184 public:
00185 DFFCell(bool _is_dram, double _WdecNANDn, double _WdecNANDp,double _cell_load);
00186 DFF ff;
00187 bool is_dram;
00188 double cell_load;
00189 double WdecNANDn;
00190 double WdecNANDp;
00191 double clock_cap;
00192
00193 double fpfp_node_cap(unsigned int fan_in, unsigned int fan_out);
00194 void compute_DFF_cell(void);
00195 };
00196
00197 #endif