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00015 #ifndef PROCESSOR_H
00016 #define PROCESSOR_H
00017
00018 #include "sst_stdint.h"
00019 #include "sst/core/component.h"
00020 #include <sst/core/cpunicEvent.h>
00021 #include "thread.h"
00022 #include "memory.h"
00023 #include "ptoVMapper.h"
00024 #include "pimSysCallTypes.h"
00025 #include <vector>
00026 #include <utility>
00027 #include <boost/serialization/list.hpp>
00028
00029
00030
00031 using namespace std;
00032 using namespace SST;
00033
00034 typedef SST::Component* (*ownerCheckFunc)(const simAddress, const simPID);
00035
00036
00037 struct procPIDPair {
00038
00039 processor *first;
00040
00041 simPID second;
00042
00043
00044
00045
00046 string binaryName;
00047
00048 procPIDPair(processor *p, simPID pid) : first(p), second(pid),
00049 binaryName("") {;}
00050 procPIDPair(processor *p, simPID pid, const string b) : first(p), second(pid),
00051 binaryName(b) {;}
00052 };
00053 typedef vector<procPIDPair> procStartVec;
00054 typedef procStartVec (*getFirstThreadsHomeFunc)(string cfgstr);
00055
00056
00057
00058 class processor : public SST::Component, public memory, public ptoVmapper
00059 {
00060 #if WANT_CHECKPOINT_SUPPORT
00061 BOOST_SERIALIZE {
00062 BOOST_VOID_CAST_REGISTER(processor*,Component*);
00063 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( Component );
00064 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( memory );
00065 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( ptoVmapper );
00066 ar & BOOST_SERIALIZATION_NVP(myProcNum);
00067 ar & BOOST_SERIALIZATION_NVP(myCoreNum);
00068 ar & BOOST_SERIALIZATION_NVP(numCores);
00069 }
00070 #endif
00071
00072
00073 protected:
00074 int currentRunningCore;
00075 private:
00076
00077 volatile bool nic_response;
00078
00079
00080
00081 public:
00082 virtual int Setup( ) { return 0; }
00083 virtual int Finish( ) { return 0; }
00084
00085
00086
00087
00088
00089
00090
00091 public:
00092 void procExit() {
00093 unregisterExit();
00094 }
00095
00096
00097
00098
00099 processor(ComponentId_t id, Params_t& params) :
00100 Component( id ), memory(0),
00101 currentRunningCore(-1)
00102 {
00103 setUpLocalDistribution(12, 1);
00104 nic_response= false;
00105 INFO("Processor at %p initialized\n", this);
00106 }
00107
00108
00109
00110
00111
00112
00113 procStartVec getFirstThreadsHomes();
00114 bool CopyToSIM(simAddress dest, const simPID, void* source, const unsigned int Bytes);
00115 bool LoadToSIM(simAddress dest, const simPID, void* source, const unsigned int Bytes);
00116 bool CopyFromSIM(void* dest, const simAddress source, const simPID, const unsigned int Bytes);
00117
00118 int getProcNum() const {return 1;}
00119
00120 int getCoreNum() const {return getCurrentRunningCore();}
00121
00122 virtual int getNumCores() const = 0;
00123 int getCurrentRunningCore() const {return currentRunningCore;}
00124
00125
00126
00127
00128
00129
00130
00131
00132
00133
00134
00135
00136
00137
00138
00139
00140
00141
00142
00143
00144
00145
00146 virtual bool insertThread(thread*)=0;
00147
00148
00149
00150 virtual bool isLocal(const simAddress, const simPID)=0;
00151
00152
00153
00154 virtual bool spawnToCoProc(const PIM_coProc, thread* t, simRegister hint)=0;
00155
00156
00157
00158
00159 virtual bool switchAddrMode(PIM_addrMode) = 0;
00160
00161
00162
00163
00164 virtual exceptType writeSpecial(const PIM_cmd, const int nargs,
00165 const uint *args)=0;
00166
00167
00168
00169
00170 virtual exceptType readSpecial(const PIM_cmd cmd, const int nInArgs,
00171 const int nOutArgs, const simRegister *args,
00172 simRegister *rets) {
00173 exceptType retval = PROC_EXCEPTION;
00174 switch( cmd ) {
00175 case PIM_CMD_GET_NUM_CORE:
00176 rets[0] = ntohl(getNumCores());
00177 retval = NO_EXCEPTION;
00178 break;
00179 case PIM_CMD_GET_CORE_NUM:
00180 rets[0] = ntohl(getCoreNum());
00181 retval = NO_EXCEPTION;
00182 break;
00183 case PIM_CMD_GET_MHZ:
00184
00185 retval = NO_EXCEPTION;
00186 break;
00187 default:
00188 ;
00189 }
00190 return retval;
00191 };
00192
00193
00194
00195
00196 virtual void resetCounters() {
00197 printf("Reset Counters Not Supported on this Processor.\n");
00198 }
00199
00200
00201
00202
00203 static inline void checkNumArgs(const PIM_cmd cmd, const int givenInArgs,
00204 const int givenOutArgs,
00205 const int reqInArgs, const int reqOutArgs) {
00206 if (givenInArgs != reqInArgs) {
00207 printf("Syscall %d does not have %d Input arguments. (%d given)\n", cmd,
00208 reqInArgs, givenInArgs);
00209 }
00210 if (givenOutArgs != reqOutArgs) {
00211 printf("Syscall %d does not have %d Output arguments. (%d given)\n", cmd,
00212 reqOutArgs, givenOutArgs);
00213 }
00214 }
00215
00216
00217 virtual bool forwardToNetsimNIC(int call_num, char *params,
00218 const size_t params_length,
00219 char *buf, const size_t buf_len) = 0;
00220
00221
00222 virtual bool pickupNetsimNIC(CPUNicEvent **event) = 0;
00223
00224
00225 std::list<CPUNicEvent *> staging_area;
00226
00227 int getNICresponse(void) {return !staging_area.empty();}
00228
00229 virtual bool externalMemoryModel() = 0;
00230
00231 virtual bool sendMemoryReq( instType, uint64_t address,
00232 instruction *inst, int mProcID) = 0;
00233
00234
00235
00236
00237 virtual bool sendMemoryParcel(uint64_t address, instruction *inst,
00238 int mProcID) = 0;
00239
00240 void addNICevent(CPUNicEvent *e) {
00241 staging_area.push_back(e);
00242 }
00243
00244 CPUNicEvent *getNICevent(void) {
00245 CPUNicEvent *rc;
00246
00247 rc= staging_area.front();
00248 staging_area.pop_front();
00249 return rc;
00250 }
00251
00252
00253
00254 virtual void dataCacheInvalidate( simAddress addr ) {WARN("not implemented\n");};
00255
00256 #define CPU_MEM_FUNC_GEN(S) \
00257 virtual uint##S##_t ReadMemory##S(const simAddress sa, const bool s) { \
00258 return memory::ReadMemory##S( getPhysAddr(sa), s); \
00259 } \
00260 virtual bool WriteMemory##S(const simAddress sa, const uint##S##_t d, \
00261 const bool s) { \
00262 return memory::WriteMemory##S( getPhysAddr(sa), d, s); \
00263 }
00264
00265 CPU_MEM_FUNC_GEN(8)
00266 CPU_MEM_FUNC_GEN(16)
00267 CPU_MEM_FUNC_GEN(32)
00268 CPU_MEM_FUNC_GEN(64)
00269
00270 };
00271
00272 #endif