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sst/core/techModels/libMcPATbeta06/XML_Parse.h

00001 /*****************************************************************************
00002  *                                McPAT
00003  *                      SOFTWARE LICENSE AGREEMENT
00004  *            Copyright 2009 Hewlett-Packard Development Company, L.P.
00005  *                          All Rights Reserved
00006  *
00007  * Permission to use, copy, and modify this software and its documentation is
00008  * hereby granted only under the following terms and conditions.  Both the
00009  * above copyright notice and this permission notice must appear in all copies
00010  * of the software, derivative works or modified versions, and any portions
00011  * thereof, and both notices must appear in supporting documentation.
00012  *
00013  * Any User of the software ("User"), by accessing and using it, agrees to the
00014  * terms and conditions set forth herein, and hereby grants back to Hewlett-
00015  * Packard Development Company, L.P. and its affiliated companies ("HP") a
00016  * non-exclusive, unrestricted, royalty-free right and license to copy,
00017  * modify, distribute copies, create derivate works and publicly display and
00018  * use, any changes, modifications, enhancements or extensions made to the
00019  * software by User, including but not limited to those affording
00020  * compatibility with other hardware or software, but excluding pre-existing
00021  * software applications that may incorporate the software.  User further
00022  * agrees to use its best efforts to inform HP of any such changes,
00023  * modifications, enhancements or extensions.
00024  *
00025  * Correspondence should be provided to HP at:
00026  *
00027  * Director of Intellectual Property Licensing
00028  * Office of Strategy and Technology
00029  * Hewlett-Packard Company
00030  * 1501 Page Mill Road
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00032  *
00033  * The software may be further distributed by User (but not offered for
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00035  * condition that such third parties agree to abide by the terms and
00036  * conditions of this license.
00037  *
00038  * THE SOFTWARE IS PROVIDED "AS IS" WITH ANY AND ALL ERRORS AND DEFECTS
00039  * AND USER ACKNOWLEDGES THAT THE SOFTWARE MAY CONTAIN ERRORS AND DEFECTS.
00040  * HP DISCLAIMS ALL WARRANTIES WITH REGARD TO THE SOFTWARE, INCLUDING ALL
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00042  * HP BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
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00046  *
00047  ***************************************************************************/
00048 
00049 #ifndef XML_PARSE_H_
00050 #define XML_PARSE_H_
00051 
00052 
00053 //#ifdef WIN32
00054 //#define _CRT_SECURE_NO_DEPRECATE
00055 //#endif
00056 
00057 #include <stdio.h>
00058 #include "xmlParser.h"
00059 #include <string.h>
00060 #include <iostream>
00061 using namespace std;
00062 
00063 /*
00064 void myfree(char *t); // {free(t);}
00065 ToXMLStringTool tx,tx2;
00066 */
00067 //all subnodes at the level of system.core(0-n)
00068 typedef struct{
00069         int prediction_width;
00070         char prediction_scheme[20];
00071         int predictor_size;
00072         int predictor_entries;
00073         int local_predictor_size;
00074         int local_predictor_entries;
00075         int global_predictor_entries;
00076         int global_predictor_bits;
00077         int chooser_predictor_entries;
00078         int chooser_predictor_bits;
00079         double predictor_accesses;
00080 } predictor_systemcore;
00081 typedef struct{
00082         int number_entries;
00083         double total_hits;
00084         double total_accesses;
00085         double total_misses;
00086         double conflicts;
00087 } itlb_systemcore;
00088 typedef struct{
00089         //params
00090         int icache_config[20];
00091         int buffer_sizes[20];
00092         //stats
00093         double total_accesses;
00094         double read_accesses;
00095         double read_misses;
00096         double replacements;
00097         double read_hits;
00098         double total_hits;
00099         double total_misses;
00100         double miss_buffer_access;
00101         double fill_buffer_accesses;
00102         double prefetch_buffer_accesses;
00103         double prefetch_buffer_writes;
00104         double prefetch_buffer_reads;
00105         double prefetch_buffer_hits;
00106         double conflicts;
00107 } icache_systemcore;
00108 typedef struct{
00109         //params
00110         int number_entries;
00111         //stats
00112         double total_accesses;
00113         double read_accesses;
00114         double write_accesses;
00115         double write_hits;
00116         double read_hits;
00117         double read_misses;
00118         double write_misses;
00119         double total_hits;
00120         double total_misses;
00121         double conflicts;
00122 } dtlb_systemcore;
00123 typedef struct{
00124         //params
00125         int dcache_config[20];
00126         int buffer_sizes[20];
00127         //stats
00128         double total_accesses;
00129         double read_accesses;
00130         double write_accesses;
00131         double total_hits;
00132         double total_misses;
00133         double read_hits;
00134         double write_hits;
00135         double read_misses;
00136         double write_misses;
00137         double replacements;
00138         double write_backs;
00139         double miss_buffer_access;
00140         double fill_buffer_accesses;
00141         double prefetch_buffer_accesses;
00142         double prefetch_buffer_writes;
00143         double prefetch_buffer_reads;
00144         double prefetch_buffer_hits;
00145         double wbb_writes;
00146         double wbb_reads;
00147         double conflicts;
00148 } dcache_systemcore;
00149 typedef struct{
00150         //params
00151         int BTB_config[20];
00152         //stats
00153         double total_accesses;
00154         double read_accesses;
00155         double write_accesses;
00156         double total_hits;
00157         double total_misses;
00158         double read_hits;
00159         double write_hits;
00160         double read_misses;
00161         double write_misses;
00162         double replacements;
00163 } BTB_systemcore;
00164 typedef struct{
00165         //all params at the level of system.core(0-n)
00166         int clock_rate;
00167         int machine_bits;
00168         int virtual_address_width;
00169         int physical_address_width;
00170         int opcode_width;
00171         int instruction_length;
00172         int machine_type;
00173         int internal_datapath_width;
00174         int number_hardware_threads;
00175         int fetch_width;
00176         int number_instruction_fetch_ports;
00177         int decode_width;
00178         int issue_width;
00179         int commit_width;
00180         int pipelines_per_core[20];
00181         int pipeline_depth[20];
00182         char FPU[20];
00183         char divider_multiplier[20];
00184         int ALU_per_core;
00185         int FPU_per_core;
00186         int instruction_buffer_size;
00187         int decoded_stream_buffer_size;
00188         int instruction_window_scheme;
00189         int instruction_window_size;
00190         int fp_instruction_window_size;
00191         int ROB_size;
00192         int archi_Regs_IRF_size;
00193         int archi_Regs_FRF_size;
00194         int phy_Regs_IRF_size;
00195         int phy_Regs_FRF_size;
00196         int rename_scheme;
00197         int register_windows_size;
00198         char LSU_order[20];
00199         int store_buffer_size;
00200         int load_buffer_size;
00201         int memory_ports;
00202         char Dcache_dual_pump[20];
00203         int RAS_size;
00204         int fp_issue_width;
00205         int prediction_width;
00206 
00207         //all stats at the level of system.core(0-n)
00208         double total_instructions;
00209         double int_instructions;
00210         double fp_instructions;
00211         double branch_instructions;
00212         double branch_mispredictions;
00213         double committed_instructions;
00214         double committed_int_instructions;
00215         double committed_fp_instructions;
00216         double load_instructions;
00217         double store_instructions;
00218         double total_cycles;
00219         double idle_cycles;
00220         double busy_cycles;
00221         double instruction_buffer_reads;
00222         double instruction_buffer_write;
00223         double ROB_reads;
00224         double ROB_writes;
00225         double rename_accesses;
00226         double fp_rename_accesses;
00227         double inst_window_reads;
00228         double inst_window_writes;
00229         double inst_window_wakeup_accesses;
00230         double inst_window_selections;
00231         double fp_inst_window_reads;
00232         double fp_inst_window_writes;
00233         double fp_inst_window_wakeup_accesses;
00234         double fp_inst_window_selections;
00235         double archi_int_regfile_reads;
00236         double archi_float_regfile_reads;
00237         double phy_int_regfile_reads;
00238         double phy_float_regfile_reads;
00239         double phy_int_regfile_writes;
00240         double phy_float_regfile_writes;
00241         double archi_int_regfile_writes;
00242         double archi_float_regfile_writes;
00243         double int_regfile_reads;
00244         double float_regfile_reads;
00245         double int_regfile_writes;
00246         double float_regfile_writes;
00247         double windowed_reg_accesses;
00248         double windowed_reg_transports;
00249         double function_calls;
00250         double context_switches;
00251         double ialu_access;
00252         double fpu_access;
00253         double bypassbus_access;
00254         double load_buffer_reads;
00255         double load_buffer_writes;
00256         double load_buffer_cams;
00257         double store_buffer_reads;
00258         double store_buffer_writes;
00259         double store_buffer_cams;
00260         double store_buffer_forwards;
00261         double main_memory_access;
00262         double main_memory_read;
00263         double main_memory_write;
00264         //all subnodes at the level of system.core(0-n)
00265         predictor_systemcore predictor;
00266         itlb_systemcore itlb;
00267         icache_systemcore icache;
00268         dtlb_systemcore dtlb;
00269         dcache_systemcore dcache;
00270         BTB_systemcore BTB;
00271 
00272 } system_core;
00273 typedef struct{
00274         //params
00275         int Directory_type;
00276         int Dir_config[20];
00277         int buffer_sizes[20];
00278         int clockrate;
00279         int ports[20];
00280         int device_type;
00281         char threeD_stack[20];
00282         //stats
00283         double total_accesses;
00284         double read_accesses;
00285         double write_accesses;
00286         double read_misses;
00287         double write_misses;
00288         double conflicts;
00289 } system_L1Directory;
00290 typedef struct{
00291         //params
00292         int Directory_type;
00293         int Dir_config[20];
00294         int buffer_sizes[20];
00295         int clockrate;
00296         int ports[20];
00297         int device_type;
00298         char threeD_stack[20];
00299         //stats
00300         double total_accesses;
00301         double read_accesses;
00302         double write_accesses;
00303         double read_misses;
00304         double write_misses;
00305         double conflicts;
00306 } system_L2Directory;
00307 typedef struct{
00308         //params
00309         int L2_config[20];
00310         int clockrate;
00311         int ports[20];
00312         int device_type;
00313         char threeD_stack[20];
00314         int buffer_sizes[20];
00315         //stats
00316         double total_accesses;
00317         double read_accesses;
00318         double write_accesses;
00319         double total_hits;
00320         double total_misses;
00321         double read_hits;
00322         double write_hits;
00323         double read_misses;
00324         double write_misses;
00325         double replacements;
00326         double write_backs;
00327         double miss_buffer_accesses;
00328         double fill_buffer_accesses;
00329         double prefetch_buffer_accesses;
00330         double prefetch_buffer_writes;
00331         double prefetch_buffer_reads;
00332         double prefetch_buffer_hits;
00333         double wbb_writes;
00334         double wbb_reads;
00335         double conflicts;
00336 } system_L2;
00337 typedef struct{
00338         //params
00339         int L3_config[20];
00340         int clockrate;
00341         int ports[20];
00342         int device_type;
00343         char threeD_stack[20];
00344         int buffer_sizes[20];
00345         //stats
00346         double total_accesses;
00347         double read_accesses;
00348         double write_accesses;
00349         double total_hits;
00350         double total_misses;
00351         double read_hits;
00352         double write_hits;
00353         double read_misses;
00354         double write_misses;
00355         double replacements;
00356         double write_backs;
00357         double miss_buffer_accesses;
00358         double fill_buffer_accesses;
00359         double prefetch_buffer_accesses;
00360         double prefetch_buffer_writes;
00361         double prefetch_buffer_reads;
00362         double prefetch_buffer_hits;
00363         double wbb_writes;
00364         double wbb_reads;
00365         double conflicts;
00366 } system_L3;
00367 typedef struct{
00368         //params
00369         int number_of_inputs_of_crossbars;
00370         int number_of_outputs_of_crossbars;
00371         int flit_bits;
00372         int input_buffer_entries_per_port;
00373         int ports_of_input_buffer[20];
00374         //stats
00375         double crossbar_accesses;
00376 } xbar0_systemNoC;
00377 typedef struct{
00378         //params
00379         int clockrate;
00380         char topology[20];
00381         int horizontal_nodes;
00382         int vertical_nodes;
00383         int has_global_link;
00384         int link_throughput;
00385         int link_latency;
00386         int input_ports;
00387         int output_ports;
00388         int virtual_channel_per_port;
00389         int flit_bits;
00390         int input_buffer_entries_per_vc;
00391         int ports_of_input_buffer[20];
00392         int dual_pump;
00393         int number_of_crossbars;
00394         char crossbar_type[20];
00395         char crosspoint_type[20];
00396         xbar0_systemNoC xbar0;
00397         int arbiter_type;
00398         //stats
00399         double total_accesses;
00400 } system_NoC;
00401 typedef struct{
00402         //params
00403         int mem_tech_node;
00404         int device_clock;
00405         int peak_transfer_rate;
00406         int internal_prefetch_of_DRAM_chip;
00407         int capacity_per_channel;
00408         int number_ranks;
00409         int num_banks_of_DRAM_chip;
00410         int Block_width_of_DRAM_chip;
00411         int output_width_of_DRAM_chip;
00412         int page_size_of_DRAM_chip;
00413         int burstlength_of_DRAM_chip;
00414         //stats
00415         double memory_accesses;
00416         double memory_reads;
00417         double memory_writes;
00418 } system_mem;
00419 typedef struct{
00420         //params
00421     int mc_clock;
00422     int llc_line_length;
00423         int number_mcs;
00424         int memory_channels_per_mc;
00425         int req_window_size_per_channel;
00426         int IO_buffer_size_per_channel;
00427         int databus_width;
00428         int addressbus_width;
00429         //stats
00430         double memory_accesses;
00431         double memory_reads;
00432         double memory_writes;
00433 } system_mc;
00434 
00435 typedef struct{
00436         //All number_of_* at the level of 'system' Ying 03/21/2009
00437         int number_of_cores;
00438         int number_of_L1Directories;
00439         int number_of_L2Directories;
00440         int number_of_L2s;
00441         int number_of_L3s;
00442         int number_of_NoCs;
00443         int number_of_dir_levels;
00444     int domain_size;
00445     int first_level_dir;
00446         // All params at the level of 'system'
00447         int homogeneous_cores;
00448         int homogeneous_L1Directories;
00449         int homogeneous_L2Directories;
00450         double core_tech_node;
00451         int target_core_clockrate;
00452         int target_chip_area;
00453         int temperature;
00454         int number_cache_levels;
00455         int L1_property;
00456         int L2_property;
00457         int homogeneous_L2s;
00458         int L3_property;
00459         int homogeneous_L3s;
00460         int homogeneous_NoCs;
00461         int homogeneous_ccs;
00462         int Max_area_deviation;
00463         int Max_power_deviation;
00464         int device_type;
00465         int opt_dynamic_power;
00466         int opt_lakage_power;
00467         int opt_clockrate;
00468         int opt_area;
00469         int interconnect_projection_type;
00470         int machine_bits;
00471         int virtual_address_width;
00472         int physical_address_width;
00473         int virtual_memory_page_size;
00474     double total_cycles;
00475         //system.core(0-n):3rd level
00476         system_core core[64];
00477         system_L1Directory L1Directory[64];
00478         system_L2Directory L2Directory[64];
00479         system_L2 L2[64];
00480         system_L3 L3[64];
00481     system_NoC NoC[64];
00482     system_mem mem;
00483         system_mc mc;
00484 } root_system;
00485 
00486 class ParseXML
00487 {
00488 public:
00489         void parse(char* filepath);
00490     void initialize();
00491 public:
00492         root_system sys;
00493 };
00494 
00495 
00496 #endif /* XML_PARSE_H_ */
00497 
00498 
00499 
00500 

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