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sst/elements/genericProc/proc.h

00001 // Copyright 2009-2010 Sandia Corporation. Under the terms
00002 // of Contract DE-AC04-94AL85000 with Sandia Corporation, the U.S.
00003 // Government retains certain rights in this software.
00004 // 
00005 // Copyright (c) 2009-2010, Sandia Corporation
00006 // All rights reserved.
00007 // 
00008 // This file is part of the SST software package. For license
00009 // information, see the LICENSE file in the top level directory of the
00010 // distribution.
00011 
00012 #ifndef PROC_H_
00013 #define PROC_H_
00014 
00015 #include "sst/core/component.h"
00016 #include <sst/core/link.h>
00017 #include <sst/core/cpunicEvent.h>
00018 #include <memory.h>
00019 #include "fe_memory.h"
00020 #include <sst_config.h>
00021 #include "ssBackEnd/ssb_mainProc.h"
00022 #include "FE/thread.h"
00023 #include "FE/processor.h"
00024 
00025 #if HAVE_PHXSIM_H
00026 #include <../PHXSimC/PHXEvent.h>
00027 #endif
00028 
00029 using namespace SST;
00030 
00031 #define DBG_GPROC 1
00032 #if DBG_GPROC
00033 #define _GPROC_DBG( lvl, fmt, args...)\
00034     if (gproc_debug >= lvl)   { \
00035         printf( "%d:genericProc::%s():%d: "fmt, _debug_rank,__FUNCTION__,__LINE__, ## args ); \
00036     }
00037 #else
00038 #define _GPROC_DBG( lvl, fmt, args...)
00039 #endif
00040 
00041 #define TIME_MEM 1
00042 
00043 extern int gproc_debug;
00044 
00045 // "test" class
00046 class tester : public Component {
00047     public:
00048         tester(ComponentId_t id, Params_t &params) :
00049             Component(id)
00050         {
00051             std::string frequency = params["clock"];
00052             if (frequency.length() == 0) {
00053                 INFO("Using default frequency for tester (1.0 GHz)");
00054                 frequency = "1.0 GHz";
00055             }
00056             printf("generating tester with freq '%s' (len:%i)\n", frequency.c_str(), (int)frequency.length());
00057 //          Clockhandler_t *handler = new EventHandler<tester,bool,Cycle_t>(this, &tester::clock);
00058 //          registerClock(frequency, handler);
00059             registerClock(frequency, new Clock::Handler<tester>(this, &tester::clock) );
00060         }
00061         bool clock(Cycle_t thisCycle)
00062         {
00063             printf("cycle is now: %llu\n", (unsigned long long)getCurrentSimTime());
00064             return false;
00065         }
00066 };
00067 
00068 // "memory" class
00069 class mem : public Component {
00070     private:
00071         MemoryChannel<uint64_t> *memchan;
00072     public:
00073         mem(ComponentId_t id, Params_t& params) :
00074             Component(id)
00075         {
00076             memchan = new MemoryChannel<uint64_t>(*this, params, "bus");
00077             std::string frequency = params["clock"];
00078             if (frequency.length() == 0) {
00079                 INFO("Using default frequency for genericMem (2.0 GHz)");
00080                 frequency = "2.0 GHz";
00081             }
00082 //          ClockHandler_t *handler = new EventHandler<mem,bool,Cycle_t>(this, &mem::clock);
00083 //          registerClock(frequency, handler);
00084             registerClock(frequency, new Clock::Handler<mem>(this, &mem::clock) );
00085         }
00086         bool clock(Cycle_t thisCycle)
00087         {
00088             MemoryChannel<uint64_t>::event_t *event;
00089             while (memchan->recv(&event)) {
00090                 event->msgType = MemoryChannel<uint64_t>::event_t::RESPONSE;
00091                 if (!memchan->send(event)) {
00092                     abort(); // this is ugly
00093                 }
00094             }
00095             return false;
00096         }
00097 };
00098 
00099 // "processor" class
00100 class proc : public processor {
00101 
00102 #if 0 // WANT_CHECKPOINT_SUPPORT
00103 BOOST_SERIALIZE {
00104     _GPROC_DBG(1, "begin\n");
00105     BOOST_VOID_CAST_REGISTER(proc*,processor*);
00106     _GPROC_DBG(1, "base\n");
00107     ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( processor );
00108     _GPROC_DBG(1, "links\n");
00109     ar & BOOST_SERIALIZATION_NVP( memLinks );
00110     ar & BOOST_SERIALIZATION_NVP( netLinks );
00111     _GPROC_DBG(1, "tSource\n");
00112     ar & BOOST_SERIALIZATION_NVP( tSource );
00113     _GPROC_DBG(1, "thread\n");
00114     ar & BOOST_SERIALIZATION_NVP( myThread );
00115     _GPROC_DBG(1, "ss\n");
00116     ar & BOOST_SERIALIZATION_NVP( ssBackEnd );
00117     //ar & BOOST_SERIALIZATION_NVP( mProc );
00118     _GPROC_DBG(1, "end\n");
00119   }
00120   SAVE_CONSTRUCT_DATA( proc ) {
00121     _GPROC_DBG(1, "begin\n");
00122     ar << BOOST_SERIALIZATION_NVP( t->id );
00123     ar << BOOST_SERIALIZATION_NVP( t->params );
00124     _GPROC_DBG(1, "end\n");
00125   }
00126   LOAD_CONSTRUCT_DATA( proc ) {
00127     _GPROC_DBG(1, "begin\n");
00128     ComponentId_t     id;
00129     Params_t          params;
00130     ar >> BOOST_SERIALIZATION_NVP( id );
00131     ar >> BOOST_SERIALIZATION_NVP( params );
00132     // call the dummy constructor which dosn't initialize the thread source
00133     ::new(t)proc( id, params, 0 );
00134   }
00135 #endif
00136 
00137 public:
00138   //  typedef MemoryDev< uint64_t, instruction* > memDev_t; 
00139   typedef Memory< uint64_t, instruction* > memory_t; 
00140 private:
00141   // links to memory
00142   std::vector< memory_t* > memory;
00143   // links to other processors
00144   std::vector<Link*> netLinks;
00145   // link to advanced memory
00146   //
00147   // optional link for advanced memory
00148   Link *advMem;
00149   // thread source
00150   threadSource tSource;
00151   // thread of execution
00152   thread *myThread;
00153   // use a Simple-scalar-based backend timing model
00154   int ssBackEnd;
00155   // use an external memory model
00156   int externalMem;
00157   // maximum main memory references outstanding
00158   int maxMMOut;
00159   // run in "fast" mode until a rest
00160   int fastTillReset;
00161   // number of cores
00162   int cores; 
00163   // coherency
00164   int coherent;
00165   // maximum number of outstanding special memory requests per core
00166   int maxOutstandingSpecReq;
00167   // the simple-scalar-based processor model
00168   vector<mainProc *> mProcs;
00169   // count of outstanding special memory requests
00170   vector <int> outstandingSpecReq;
00171   // record of who a memory request belongs to, and when it was issued
00172   typedef pair<int, uint64_t> memReqRec_t;
00173   // map of outgoing memory request instructions to cores
00174   typedef map<instruction *, memReqRec_t> memReqMap_t;
00175   // map of outgoing normal (load, store) memory requests
00176   //
00177   // maps instructions to cores
00178   memReqMap_t memReqMap;
00179   // map of AMO memory requests
00180   //
00181   // AMOs, advanced memory, etc..
00182   memReqMap_t memSpecReqMap;
00183 
00184   instruction* onDeckInst;
00185 
00186 #if TIME_MEM
00187   uint64_t totalMemReq;
00188   uint64_t totalSpecialMemReq;
00189   uint64_t numMemReq;
00190   uint64_t memReqLat;
00191   uint64_t memSpecialReqLat;
00192   uint64_t memStores;
00193   uint64_t memStartNS;
00194 #endif
00195   uint64_t MCReads;
00196   uint64_t MCWrites;
00197 
00198   Event::Handler<proc> *NICeventHandler;
00199 
00200   ComponentId_t id;
00201   Params_t& params;
00202 
00203   bool addThread(thread *);
00204   void swapThreads(bool quanta, bool refill);
00205   // flag to determine if we are flushing pipes and need to check for
00206   // thread swaps
00207   bool needThreadSwap;
00208   std::deque<thread*> threadQ;
00209 
00210 public:
00211   /* shared memory coherency protocol handling */  
00212   //: Bus Message types
00213   typedef enum {READ_MISS, WRITE_MISS, WRITE_HIT} msgType;
00214   // Post a message to the bus
00215   int postMessage(msgType t, simAddress addr, mainProc* poster);
00216   //: add in contention on the bus (if any)
00217   void registerPost() {;};
00218   const bool isCoherent() const {return coherent;}
00219 
00220   virtual int Setup();
00221   virtual int Finish();
00222   virtual bool preTic( Cycle_t );
00223   void processMemDevResp( );
00224   virtual void handle_nic_events( Event* );
00225   proc(ComponentId_t id, Params_t& params);
00226   proc(ComponentId_t id, Params_t& params, int dummy);
00227 
00228   virtual void resetCounters();
00229   //: Return num of cores
00230   virtual int getNumCores() const {return mProcs.size();}
00231   virtual bool insertThread(thread*);
00232   virtual bool isLocal(const simAddress, const simPID);
00233   virtual bool spawnToCoProc(const PIM_coProc, thread* t, simRegister hint);
00234   virtual bool switchAddrMode(PIM_addrMode);
00235   virtual exceptType writeSpecial(const PIM_cmd, const int nargs, 
00236                                   const uint *args);
00237   virtual bool forwardToNetsimNIC(int call_num, char *params,
00238                                   const size_t params_length,
00239                                   char *buf, const size_t buf_len);
00240   virtual bool pickupNetsimNIC(CPUNicEvent **event);
00241   virtual bool externalMemoryModel();
00242   virtual bool sendMemoryReq( instType, uint64_t address, 
00243                                instruction*, int mProcID);
00244   virtual int getOutstandingAdvancedMemReqs(int mProcID, int *max);
00245 #if HAVE_PHXSIM_H
00246   virtual bool sendMemoryParcel(uint64_t address, instruction *inst, 
00247                                 PHXEvent *pe, int mProcID);
00248 
00249 #endif
00250 };
00251 
00252 #endif

Generated on Fri Oct 22 2010 11:02:22 for SST by  doxygen 1.7.1