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sst/core/techModels/libORION/SIM_array_model.h

00001 /*-------------------------------------------------------------------------
00002  *                             ORION 2.0 
00003  *
00004  *                                              Copyright 2009 
00005  *      Princeton University, and Regents of the University of California 
00006  *                         All Rights Reserved
00007  *
00008  *                         
00009  *  ORION 2.0 was developed by Bin Li at Princeton University and Kambiz Samadi at
00010  *  University of California, San Diego. ORION 2.0 was built on top of ORION 1.0. 
00011  *  ORION 1.0 was developed by Hangsheng Wang, Xinping Zhu and Xuning Chen at 
00012  *  Princeton University.
00013  *
00014  *  If your use of this software contributes to a published paper, we
00015  *  request that you cite our paper that appears on our website 
00016  *  http://www.princeton.edu/~peh/orion.html
00017  *
00018  *  Permission to use, copy, and modify this software and its documentation is
00019  *  granted only under the following terms and conditions.  Both the
00020  *  above copyright notice and this permission notice must appear in all copies
00021  *  of the software, derivative works or modified versions, and any portions
00022  *  thereof, and both notices must appear in supporting documentation.
00023  *
00024  *  This software may be distributed (but not offered for sale or transferred
00025  *  for compensation) to third parties, provided such third parties agree to
00026  *  abide by the terms and conditions of this notice.
00027  *
00028  *  This software is distributed in the hope that it will be useful to the
00029  *  community, but WITHOUT ANY WARRANTY; without even the implied warranty of
00030  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00031  *
00032  *-----------------------------------------------------------------------*/
00033 
00034 #ifndef _SIM_ARRAY_MODEL_H
00035 #define _SIM_ARRAY_MODEL_H
00036 
00037 /* WHS: all model types begin with 1 because 0 is reserved for SIM_ARRAY_NO_MODEL */
00038 #define SIM_ARRAY_NO_MODEL      0
00039 
00040 /*@
00041  * data type: decoder model types
00042  *
00043  *   GENERIC_DEC   -- default type
00044  *   DEC_MAX_MODEL -- upper bound of model type
00045  */
00046 typedef enum {
00047         GENERIC_DEC = 1,
00048         DEC_MAX_MODEL
00049 } SIM_dec_model_t;
00050 
00051 /*@
00052  * data type: multiplexor model types
00053  *
00054  *   GENERIC_MUX   -- default type
00055  *   MUX_MAX_MODEL -- upper bound of model type
00056  */
00057 typedef enum {
00058         GENERIC_MUX = 1,
00059         MUX_MAX_MODEL
00060 } SIM_mux_model_t;
00061 
00062 /*@
00063  * data type: sense amplifier model types
00064  *
00065  *   GENERIC_AMP   -- default type
00066  *   AMP_MAX_MODEL -- upper bound of model type
00067  */
00068 typedef enum {
00069         GENERIC_AMP = 1,
00070         AMP_MAX_MODEL
00071 } SIM_amp_model_t;
00072 
00073 /*@
00074  * data type: wordline model types
00075  *
00076  *   CACHE_RW_WORDLINE  -- default type
00077  *   CACHE_WO_WORDLINE  -- write data wordline only, for fully-associative data bank
00078  *   CAM_RW_WORDLINE    -- both R/W tag wordlines, for fully-associative write-back
00079  *                         tag bank
00080  *   CAM_WO_WORDLINE    -- write tag wordline only, for fully-associative write-through
00081  *                         tag bank
00082  *   WORDLINE_MAX_MODEL -- upper bound of model type
00083  */
00084 typedef enum {
00085         CACHE_RW_WORDLINE = 1,
00086         CACHE_WO_WORDLINE,
00087         CAM_RW_WORDLINE,
00088         CAM_WO_WORDLINE,
00089         WORDLINE_MAX_MODEL
00090 } SIM_wordline_model_t;
00091 
00092 /*@
00093  * data type: bitline model types
00094  * 
00095  *   RW_BITLINE        -- default type
00096  *   WO_BITLINE        -- write bitline only, for fully-associative data bank and
00097  *                        fully-associative write-through tag bank
00098  *   BITLINE_MAX_MODEL -- upper bound of model type
00099  */
00100 typedef enum {
00101         RW_BITLINE = 1,
00102         WO_BITLINE,
00103         BITLINE_MAX_MODEL
00104 } SIM_bitline_model_t;
00105 
00106 /*@
00107  * data type: precharge model types
00108  *
00109  *   PRE_MAX_MODEL -- upper bound of model type
00110  */
00111 typedef enum {
00112         SINGLE_BITLINE = 1,
00113         EQU_BITLINE,
00114         SINGLE_OTHER,
00115         PRE_MAX_MODEL
00116 } SIM_pre_model_t;
00117 
00118 /*@
00119  * data type: memory cell model types
00120  *
00121  *   NORMAL_MEM     -- default type
00122  *   CAM_TAG_RW_MEM -- read/write memory cell connected with tag comparator, for
00123  *                     fully-associative write-back tag bank
00124  *   CAM_TAG_WO_MEM -- write-only memory cell connected with tag comparator, for
00125  *                     fully-associative write-through tag bank
00126  *   CAM_DATA_MEM   -- memory cell connected with output driver, for fully-associative
00127  *                     data bank
00128  *   CAM_ATTACH_MEM -- memory cell of fully-associative array valid bit, use bit, etc.
00129  *   MEM_MAX_MODEL  -- upper bound of model type
00130  */
00131 typedef enum {
00132         NORMAL_MEM = 1,
00133         CAM_TAG_RW_MEM,
00134         CAM_TAG_WO_MEM,
00135         CAM_DATA_MEM,
00136         CAM_ATTACH_MEM,
00137         MEM_MAX_MODEL
00138 } SIM_mem_model_t;
00139 
00140 /*@
00141  * data type: tag comparator model types
00142  *
00143  *   CACHE_COMP     -- default type
00144  *   CAM_COMP       -- cam-style tag comparator, for fully-associative array
00145  *   COMP_MAX_MODEL -- upper bound of model type
00146  */
00147 typedef enum {
00148         CACHE_COMP = 1,
00149         CAM_COMP,
00150         COMP_MAX_MODEL
00151 } SIM_comp_model_t;
00152 
00153 /*@
00154  * data type: output driver model types
00155  *
00156  *   CACHE_OUTDRV     -- default type
00157  *   CAM_OUTDRV       -- output driver connected with memory cell, for fully-associative
00158  *                       array
00159  *   REG_OUTDRV       -- output driver connected with bitline, for register files
00160  *   OUTDRV_MAX_MODEL -- upper bound of model type
00161  */
00162 typedef enum {
00163         CACHE_OUTDRV = 1,
00164         CAM_OUTDRV,
00165         REG_OUTDRV,
00166         OUTDRV_MAX_MODEL
00167 } SIM_outdrv_model_t;
00168 
00169 
00170 #endif /* _SIM_ARRAY_MODEL_H */
00171 

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