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00020 #ifndef CPU_DEFS_H
00021 #define CPU_DEFS_H
00022
00023 #ifndef NEED_CPU_H
00024 #error cpu.h included from common code
00025 #endif
00026
00027 #include "config.h"
00028 #include <setjmp.h>
00029 #include <inttypes.h>
00030 #include <signal.h>
00031 #include "osdep.h"
00032 #include "sys-queue.h"
00033
00034 #ifndef TARGET_LONG_BITS
00035 #error TARGET_LONG_BITS must be defined before including this header
00036 #endif
00037
00038 #ifndef TARGET_PHYS_ADDR_BITS
00039 #if TARGET_LONG_BITS >= HOST_LONG_BITS
00040 #define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS
00041 #else
00042 #define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS
00043 #endif
00044 #endif
00045
00046 #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
00047
00048
00049 #if TARGET_LONG_SIZE == 4
00050 typedef int32_t target_long;
00051 typedef uint32_t target_ulong;
00052 #define TARGET_FMT_lx "%08x"
00053 #define TARGET_FMT_ld "%d"
00054 #define TARGET_FMT_lu "%u"
00055 #elif TARGET_LONG_SIZE == 8
00056 typedef int64_t target_long;
00057 typedef uint64_t target_ulong;
00058 #define TARGET_FMT_lx "%016" PRIx64
00059 #define TARGET_FMT_ld "%" PRId64
00060 #define TARGET_FMT_lu "%" PRIu64
00061 #else
00062 #error TARGET_LONG_SIZE undefined
00063 #endif
00064
00065
00066
00067
00068
00069
00070
00071 #if TARGET_PHYS_ADDR_BITS == 32
00072 typedef uint32_t target_phys_addr_t;
00073 #define TARGET_FMT_plx "%08x"
00074 #elif TARGET_PHYS_ADDR_BITS == 64
00075 typedef uint64_t target_phys_addr_t;
00076 #define TARGET_FMT_plx "%016" PRIx64
00077 #else
00078 #error TARGET_PHYS_ADDR_BITS undefined
00079 #endif
00080
00081 #define HOST_LONG_SIZE (HOST_LONG_BITS / 8)
00082
00083 #define EXCP_INTERRUPT 0x10000
00084 #define EXCP_HLT 0x10001
00085 #define EXCP_DEBUG 0x10002
00086 #define EXCP_HALTED 0x10003
00087
00088 #define TB_JMP_CACHE_BITS 12
00089 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
00090
00091
00092
00093
00094 #define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2)
00095 #define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS)
00096 #define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1)
00097 #define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE)
00098
00099 #define CPU_TLB_BITS 8
00100 #define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
00101
00102 #if TARGET_PHYS_ADDR_BITS == 32 && TARGET_LONG_BITS == 32
00103 #define CPU_TLB_ENTRY_BITS 4
00104 #else
00105 #define CPU_TLB_ENTRY_BITS 5
00106 #endif
00107
00108 typedef struct CPUTLBEntry {
00109
00110
00111
00112
00113
00114
00115 target_ulong addr_read;
00116 target_ulong addr_write;
00117 target_ulong addr_code;
00118
00119
00120 #if TARGET_PHYS_ADDR_BITS == 64
00121
00122 target_phys_addr_t addend __attribute__((aligned(8)));
00123 #else
00124 target_phys_addr_t addend;
00125 #endif
00126
00127 uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
00128 (sizeof(target_ulong) * 3 +
00129 ((-sizeof(target_ulong) * 3) & (sizeof(target_phys_addr_t) - 1)) +
00130 sizeof(target_phys_addr_t))];
00131 } CPUTLBEntry;
00132
00133 #ifdef WORDS_BIGENDIAN
00134 typedef struct icount_decr_u16 {
00135 uint16_t high;
00136 uint16_t low;
00137 } icount_decr_u16;
00138 #else
00139 typedef struct icount_decr_u16 {
00140 uint16_t low;
00141 uint16_t high;
00142 } icount_decr_u16;
00143 #endif
00144
00145 struct kvm_run;
00146 struct KVMState;
00147
00148 typedef struct CPUBreakpoint {
00149 target_ulong pc;
00150 int flags;
00151 TAILQ_ENTRY(CPUBreakpoint) entry;
00152 } CPUBreakpoint;
00153
00154 typedef struct CPUWatchpoint {
00155 target_ulong vaddr;
00156 target_ulong len_mask;
00157 int flags;
00158 TAILQ_ENTRY(CPUWatchpoint) entry;
00159 } CPUWatchpoint;
00160
00161 #define CPU_TEMP_BUF_NLONGS 128
00162 #define CPU_COMMON \
00163 struct TranslationBlock *current_tb; \
00164 \
00165
00166
00167 \
00168 unsigned long mem_io_pc;
00169 \
00170 target_ulong mem_io_vaddr;
00171 \
00172 uint32_t halted; \
00173 uint32_t interrupt_request; \
00174 volatile sig_atomic_t exit_request; \
00175 \
00176 CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
00177 target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
00178 struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
00179 \
00180 long temp_buf[CPU_TEMP_BUF_NLONGS]; \
00181 \
00182 int64_t icount_extra; \
00183
00184
00185 \
00186 union { \
00187 uint32_t u32; \
00188 icount_decr_u16 u16; \
00189 } icount_decr; \
00190 uint32_t can_do_io; \
00191 \
00192 \
00193 \
00194 TAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; \
00195 int singlestep_enabled; \
00196 \
00197 TAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; \
00198 CPUWatchpoint *watchpoint_hit; \
00199 \
00200 struct GDBRegisterState *gdb_regs; \
00201 \
00202 \
00203 jmp_buf jmp_env; \
00204 int exception_index; \
00205 \
00206 void *next_cpu; \
00207 int cpu_index; \
00208 int running; \
00209 \
00210 void *opaque; \
00211 \
00212 const char *cpu_model_str; \
00213 struct KVMState *kvm_state; \
00214 struct kvm_run *kvm_run; \
00215 int kvm_fd;
00216
00217 #endif