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sst/core/techModels/libORION/SIM_technology_v1.h

00001 /*-------------------------------------------------------------------------
00002  *                             ORION 2.0 
00003  *
00004  *                                              Copyright 2009 
00005  *      Princeton University, and Regents of the University of California 
00006  *                         All Rights Reserved
00007  *
00008  *                         
00009  *  ORION 2.0 was developed by Bin Li at Princeton University and Kambiz Samadi at
00010  *  University of California, San Diego. ORION 2.0 was built on top of ORION 1.0. 
00011  *  ORION 1.0 was developed by Hangsheng Wang, Xinping Zhu and Xuning Chen at 
00012  *  Princeton University.
00013  *
00014  *  If your use of this software contributes to a published paper, we
00015  *  request that you cite our paper that appears on our website 
00016  *  http://www.princeton.edu/~peh/orion.html
00017  *
00018  *  Permission to use, copy, and modify this software and its documentation is
00019  *  granted only under the following terms and conditions.  Both the
00020  *  above copyright notice and this permission notice must appear in all copies
00021  *  of the software, derivative works or modified versions, and any portions
00022  *  thereof, and both notices must appear in supporting documentation.
00023  *
00024  *  This software may be distributed (but not offered for sale or transferred
00025  *  for compensation) to third parties, provided such third parties agree to
00026  *  abide by the terms and conditions of this notice.
00027  *
00028  *  This software is distributed in the hope that it will be useful to the
00029  *  community, but WITHOUT ANY WARRANTY; without even the implied warranty of
00030  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00031  *
00032  *-----------------------------------------------------------------------*/
00033 
00034 #ifndef _SIM_TECHNOLOGY_V1_H
00035 #define _SIM_TECHNOLOGY_V1_H
00036 
00037 #include <sys/types.h>
00038 
00039 /* This file contains parameters for 110nm and above*/
00040 #if ( PARM(TECH_POINT) >= 110 )
00041 /*
00042  * Cache layout parameters and process parameters 
00043  * Thanks to Glenn Reinman for the technology scaling factors
00044  */
00045 
00046 #if ( PARM(TECH_POINT) == 110 ) /* copied from TECH_POINT 90 except LSCALE */
00047 #define CSCALE          (84.2172)       /* wire capacitance scaling factor */
00048 #define RSCALE          (80.0000)       /* wire resistance scaling factor */
00049 #define LSCALE          (0.1375)                /* length (feature) scaling factor */
00050 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00051 #define VSCALE          0.38            /* voltage scaling factor */
00052 #define VTSCALE         0.49            /* threshold voltage scaling factor */
00053 #define SSCALE          0.80            /* sense voltage scaling factor */
00054 #define MCSCALE         5.2277          /* metal coupling capacitance scaling factor */
00055 #define MCSCALE2        3               /* metal coupling capacitance scaling factor (2X) */
00056 #define MCSCALE3        1.5             /* metal coupling capacitance scaling factor (3X) */
00057 #define GEN_POWER_SCALE (1/PARM(GEN_POWER_FACTOR))
00058 #elif ( PARM(TECH_POINT) == 180 )
00059 #define CSCALE          (19.7172)       /* wire capacitance scaling factor */
00060 #define RSCALE          (20.0000)       /* wire resistance scaling factor */
00061 #define LSCALE          (0.2250)                /* length (feature) scaling factor */
00062 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00063 #define VSCALE          0.4             /* voltage scaling factor */
00064 #define VTSCALE         0.5046          /* threshold voltage scaling factor */
00065 #define SSCALE          0.85            /* sense voltage scaling factor */
00066 #define MCSCALE         4.1250          /* metal coupling capacitance scaling factor */
00067 #define MCSCALE2        2.4444          /* metal coupling capacitance scaling factor (2X) */
00068 #define MCSCALE3        1.2             /* metal coupling capacitance scaling factor (3X) */
00069 #define GEN_POWER_SCALE 1
00070 #elif ( PARM(TECH_POINT) == 250 )
00071 #define CSCALE          (10.2197)       /* wire capacitance scaling factor */
00072 #define RSCALE          (10.2571)       /* wire resistance scaling factor */
00073 #define LSCALE          (0.3571)                /* length (feature) scaling factor */
00074 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00075 #define VSCALE          0.45            /* voltage scaling factor */
00076 #define VTSCALE         0.5596          /* threshold voltage scaling factor */
00077 #define SSCALE          0.90            /* sense voltage scaling factor */
00078 #define MCSCALE         1.0             /* metal coupling capacitance scaling factor */
00079 #define MCSCALE2        1.0             /* metal coupling capacitance scaling factor (2X) */
00080 #define MCSCALE3        1.0             /* metal coupling capacitance scaling factor (3X) */
00081 #define GEN_POWER_SCALE PARM(GEN_POWER_FACTOR)
00082 #elif ( PARM(TECH_POINT) == 350 )
00083 #define CSCALE          (5.2197)        /* wire capacitance scaling factor */
00084 #define RSCALE          (5.2571)        /* wire resistance scaling factor */
00085 #define LSCALE          (0.4375 )       /* length (feature) scaling factor */
00086 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00087 #define VSCALE          0.5             /* voltage scaling factor */
00088 #define VTSCALE         0.6147          /* threshold voltage scaling factor */
00089 #define SSCALE          0.95            /* sense voltage scaling factor */
00090 #define MCSCALE         1.0             /* metal coupling capacitance scaling factor */
00091 #define MCSCALE2        1.0             /* metal coupling capacitance scaling factor (2X) */
00092 #define MCSCALE3        1.0             /* metal coupling capacitance scaling factor (3X) */
00093 #define GEN_POWER_SCALE (PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR))
00094 #elif ( PARM(TECH_POINT) == 400 )
00095 #define CSCALE          1.0             /* wire capacitance scaling factor */
00096 #define RSCALE          1.0             /* wire resistance scaling factor */
00097 #define LSCALE          0.5             /* length (feature) scaling factor */
00098 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00099 #define VSCALE          1.0             /* voltage scaling factor */
00100 #define VTSCALE         1.0             /* threshold voltage scaling factor */
00101 #define SSCALE          1.0             /* sense voltage scaling factor */
00102 #define MCSCALE         1.0             /* metal coupling capacitance scaling factor */
00103 #define MCSCALE2        1.0             /* metal coupling capacitance scaling factor (2X) */
00104 #define MCSCALE3        1.0             /* metal coupling capacitance scaling factor (3X) */
00105 #define GEN_POWER_SCALE (PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR))
00106 #else /* ( PARM(TECH_POINT) == 800 ) */
00107 #define CSCALE          1.0             /* wire capacitance scaling factor */
00108 #define RSCALE          1.0             /* wire resistance scaling factor */
00109 #define LSCALE          1.0             /* length (feature) scaling factor */
00110 #define ASCALE          (LSCALE*LSCALE) /* area scaling factor */
00111 #define VSCALE          1.0             /* voltage scaling factor */
00112 #define VTSCALE         1.0             /* threshold voltage scaling factor */
00113 #define SSCALE          1.0             /* sense voltage scaling factor */
00114 #define MCSCALE         1.0             /* metal coupling capacitance scaling factor */
00115 #define MCSCALE2        1.0             /* metal coupling capacitance scaling factor (2X) */
00116 #define MCSCALE3        1.0             /* metal coupling capacitance scaling factor (3X) */
00117 #define GEN_POWER_SCALE (PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR)*PARM(GEN_POWER_FACTOR))
00118 #endif
00119 
00120 #define MSCALE  (LSCALE * .624 / .2250)
00121 
00122 #define SCALE_T         (1.0)
00123 #define SCALE_M         (1.0)
00124 #define SCALE_S         (1.0)
00125 
00126 /*
00127  * CMOS 0.8um model parameters
00128  *   - from Appendix II of Cacti tech report
00129  */
00130 /* corresponds to 8um of m3 @ 225ff/um */
00131 #define Cwordmetal    (1.8e-15 * (CSCALE * ASCALE) * SCALE_M)
00132 
00133 /* corresponds to 16um of m2 @ 275ff/um */
00134 #define Cbitmetal     (4.4e-15 * (CSCALE * ASCALE) * SCALE_M)
00135 
00136 /* corresponds to 1um of m2 @ 275ff/um */
00137 #define Cmetal        (Cbitmetal/16)
00138 #define CM2metal      (Cbitmetal/16) 
00139 #define CM3metal      (Cbitmetal/16) 
00140 
00141 /* minimal spacing metal cap per unit length */
00142 #define CCmetal       (Cmetal * MCSCALE)
00143 #define CCM2metal     (CM2metal * MCSCALE) 
00144 #define CCM3metal     (CM3metal * MCSCALE) 
00145 /* 2x minimal spacing metal cap per unit length */
00146 #define CC2metal      (Cmetal * MCSCALE2)
00147 #define CC2M2metal    (CM2metal * MCSCALE2) 
00148 #define CC2M3metal    (CM3metal * MCSCALE2) 
00149 /* 3x minimal spacing metal cap per unit length */
00150 #define CC3metal      (Cmetal * MCSCALE3)
00151 #define CC3M2metal    (CM2metal * MCSCALE3) 
00152 #define CC3M3metal    (CM3metal * MCSCALE3) 
00153 
00154 /* um */
00155 #define Leff          (0.8 * LSCALE)
00156 /* length unit in um */
00157 #define Lamda         (Leff * 0.5)
00158 
00159 /* fF/um */
00160 #define Cpolywire       (0.25e-15 * CSCALE * LSCALE)
00161 
00162 /* ohms*um of channel width */
00163 #define Rnchannelstatic (25800 * LSCALE)
00164 
00165 /* ohms*um of channel width */
00166 #define Rpchannelstatic (61200 * LSCALE)
00167 
00168 #define Rnchannelon     (9723 * LSCALE)
00169 
00170 #define Rpchannelon     (22400 * LSCALE)
00171 
00172 /* corresponds to 16um of m2 @ 48mO/sq */
00173 #define Rbitmetal       (0.320 * (RSCALE * ASCALE))
00174 
00175 /* corresponds to  8um of m3 @ 24mO/sq */
00176 #define Rwordmetal      (0.080 * (RSCALE * ASCALE))
00177 
00178 #define krise           (0.4e-9 * LSCALE)
00179 #define tsensedata      (5.8e-10 * LSCALE)
00180 #define tsensetag       (2.6e-10 * LSCALE)
00181 #define tfalldata       (7e-10 * LSCALE)
00182 #define tfalltag        (7e-10 * LSCALE)
00183 #define Vbitpre         (3.3 * SSCALE)
00184 #define Vt              (1.09 * VTSCALE)
00185 #define Vbitsense       (0.10 * SSCALE)
00186 
00187 #define SensePowerfactor3 (PARM(Freq))*(Vbitsense)*(Vbitsense)
00188 #define SensePowerfactor2 (PARM(Freq))*(Vbitpre-Vbitsense)*(Vbitpre-Vbitsense)
00189 #define SensePowerfactor  (PARM(Freq))*Vdd*(Vdd/2)
00190 #define SenseEnergyFactor (Vdd*Vdd/2)
00191 
00192 /* transistor widths in um (as described in tech report, appendix 1) */
00193 #define Wdecdrivep      (57.0 * LSCALE)
00194 #define Wdecdriven      (40.0 * LSCALE)
00195 #define Wdec3to8n       (14.4 * LSCALE)
00196 #define Wdec3to8p       (14.4 * LSCALE)
00197 #define WdecNORn        (5.4 * LSCALE)
00198 #define WdecNORp        (30.5 * LSCALE)
00199 #define Wdecinvn        (5.0 * LSCALE)
00200 #define Wdecinvp        (10.0  * LSCALE)
00201 #define Wdff            (53.0 * LSCALE)
00202 
00203 #define Wworddrivemax   (100.0 * LSCALE)
00204 #define Wmemcella       (2.4 * LSCALE)
00205 #define Wmemcellr       (4.0 * LSCALE)
00206 #define Wmemcellw       (2.1 * LSCALE)
00207 #define Wmemcellbscale  2               /* means 2x bigger than Wmemcella */
00208 #define Wbitpreequ      (10.0 * LSCALE)
00209 
00210 #define Wbitmuxn        (10.0 * LSCALE)
00211 #define WsenseQ1to4     (4.0 * LSCALE)
00212 #define Wcompinvp1      (10.0 * LSCALE)
00213 #define Wcompinvn1      (6.0 * LSCALE)
00214 #define Wcompinvp2      (20.0 * LSCALE)
00215 #define Wcompinvn2      (12.0 * LSCALE)
00216 #define Wcompinvp3      (40.0 * LSCALE)
00217 #define Wcompinvn3      (24.0 * LSCALE)
00218 #define Wevalinvp       (20.0 * LSCALE)
00219 #define Wevalinvn       (80.0 * LSCALE)
00220 
00221 #define Wcompn          (20.0 * LSCALE)
00222 #define Wcompp          (30.0 * LSCALE)
00223 #define Wcomppreequ     (40.0 * LSCALE)
00224 #define Wmuxdrv12n      (30.0 * LSCALE)
00225 #define Wmuxdrv12p      (50.0 * LSCALE)
00226 #define WmuxdrvNANDn    (20.0 * LSCALE)
00227 #define WmuxdrvNANDp    (80.0 * LSCALE)
00228 #define WmuxdrvNORn     (60.0 * LSCALE)
00229 #define WmuxdrvNORp     (80.0 * LSCALE)
00230 #define Wmuxdrv3n       (200.0 * LSCALE)
00231 #define Wmuxdrv3p       (480.0 * LSCALE)
00232 #define Woutdrvseln     (12.0 * LSCALE)
00233 #define Woutdrvselp     (20.0 * LSCALE)
00234 #define Woutdrvnandn    (24.0 * LSCALE)
00235 #define Woutdrvnandp    (10.0 * LSCALE)
00236 #define Woutdrvnorn     (6.0 * LSCALE)
00237 #define Woutdrvnorp     (40.0 * LSCALE)
00238 #define Woutdrivern     (48.0 * LSCALE)
00239 #define Woutdriverp     (80.0 * LSCALE)
00240 #define Wbusdrvn        (48.0 * LSCALE)
00241 #define Wbusdrvp        (80.0 * LSCALE)
00242 
00243 #define Wcompcellpd2    (2.4 * LSCALE)
00244 #define Wcompdrivern    (400.0 * LSCALE)
00245 #define Wcompdriverp    (800.0 * LSCALE)
00246 #define Wcomparen2      (40.0 * LSCALE)
00247 #define Wcomparen1      (20.0 * LSCALE)
00248 #define Wmatchpchg      (10.0 * LSCALE)
00249 #define Wmatchinvn      (10.0 * LSCALE)
00250 #define Wmatchinvp      (20.0 * LSCALE)
00251 #define Wmatchnandn     (20.0 * LSCALE)
00252 #define Wmatchnandp     (10.0 * LSCALE)
00253 #define Wmatchnorn      (20.0 * LSCALE)
00254 #define Wmatchnorp      (10.0 * LSCALE)
00255 
00256 #define WSelORn         (10.0 * LSCALE)
00257 #define WSelORprequ     (40.0 * LSCALE)
00258 #define WSelPn          (10.0 * LSCALE)
00259 #define WSelPp          (15.0 * LSCALE)
00260 #define WSelEnn         (5.0 * LSCALE)
00261 #define WSelEnp         (10.0 * LSCALE)
00262 
00263 #define Wsenseextdrv1p  (40.0*LSCALE)
00264 #define Wsenseextdrv1n  (24.0*LSCALE)
00265 #define Wsenseextdrv2p  (200.0*LSCALE)
00266 #define Wsenseextdrv2n  (120.0*LSCALE)
00267 
00268 /* bit width of RAM cell in um */
00269 #define BitWidth        (16.0 * LSCALE)
00270 
00271 /* bit height of RAM cell in um */
00272 #define BitHeight       (16.0 * LSCALE)
00273 
00274 #define Cout            (0.5e-12 * LSCALE)
00275 
00276 /* Sizing of cells and spacings */
00277 #define RatCellHeight    (40.0 * LSCALE)
00278 #define RatCellWidth     (70.0 * LSCALE)
00279 #define RatShiftRegWidth (120.0 * LSCALE)
00280 #define RatNumShift      4
00281 #define BitlineSpacing   (6.0 * LSCALE)
00282 #define WordlineSpacing  (6.0 * LSCALE)
00283 
00284 #define RegCellHeight    (16.0 * LSCALE)
00285 #define RegCellWidth     (8.0  * LSCALE)
00286 
00287 #define CamCellHeight    (40.0 * LSCALE)
00288 #define CamCellWidth     (25.0 * LSCALE)
00289 #define MatchlineSpacing (6.0 * LSCALE)
00290 #define TaglineSpacing   (6.0 * LSCALE)
00291 
00292 #define CrsbarCellHeight (6.0 * LSCALE)
00293 #define CrsbarCellWidth  (6.0 * LSCALE)
00294 
00295 /*===================================================================*/
00296 
00297 /* ALU POWER NUMBERS for .18um 733Mhz */
00298 /* normalize .18um cap to other gen's cap, then xPowerfactor */
00299 #define POWER_SCALE    (GEN_POWER_SCALE * PARM(NORMALIZE_SCALE) * Powerfactor)
00300 #define I_ADD          ((.37 - .091)*POWER_SCALE)
00301 #define I_ADD32        (((.37 - .091)/2)*POWER_SCALE)
00302 #define I_MULT16       ((.31-.095)*POWER_SCALE)
00303 #define I_SHIFT        ((.21-.089)*POWER_SCALE)
00304 #define I_LOGIC        ((.04-.015)*POWER_SCALE)
00305 #define F_ADD          ((1.307-.452)*POWER_SCALE)
00306 #define F_MULT         ((1.307-.452)*POWER_SCALE)
00307 
00308 #define I_ADD_CLOCK    (.091*POWER_SCALE)
00309 #define I_MULT_CLOCK   (.095*POWER_SCALE)
00310 #define I_SHIFT_CLOCK  (.089*POWER_SCALE)
00311 #define I_LOGIC_CLOCK  (.015*POWER_SCALE)
00312 #define F_ADD_CLOCK    (.452*POWER_SCALE)
00313 #define F_MULT_CLOCK   (.452*POWER_SCALE)
00314 
00315 /* HACK: corresponds to clock network, not supported for 110nm and above*/
00316 #define Clockwire       (0) 
00317 #define Reswire         (0) 
00318 #define invCap          (0)   
00319 #define Resout          (0) 
00320 
00321 /*HACK: parameters for insertion buffer for links not supported for 110nm and above */
00322 #define BufferDriveResistance       0 
00323 #define BufferInputCapacitance      0
00324 #define BufferIntrinsicDelay        0
00325 #define BufferPMOSOffCurrent        0
00326 #define BufferNMOSOffCurrent        0
00327 #define ClockCap                    0 
00328 
00329 /*=====Parameters for Area (not supported for 110m and above)========*/
00330 #define AreaNOR         (0)  
00331 #define AreaINV         (0)  
00332 #define AreaAND         (0)  
00333 #define AreaDFF         (0) 
00334 #define AreaMUX2        (0)  
00335 #define AreaMUX3        (0) 
00336 #define AreaMUX4        (0) 
00337 
00338 /*=====Parameters for Link (not supported for 110m and above)========*/
00339 #define WireMinWidth            0
00340 #define WireMinSpacing          0
00341 #define WireMetalThickness      0
00342 #define WireBarrierThickness    0
00343 #define WireDielectricThickness 0
00344 #define WireDielectricConstant  0
00345 
00346 
00347 #endif /* PARM(TECH_POINT) >= 110 */
00348 
00349 #endif /* _SIM_TECHNOLOGY_V1_H */

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