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00034 #ifndef _SIM_ARRAY_INTERNAL_H
00035 #define _SIM_ARRAY_INTERNAL_H
00036
00037 #include <sys/types.h>
00038
00039 #define SIM_ARRAY_READ 0
00040 #define SIM_ARRAY_WRITE 1
00041
00042 #define SIM_ARRAY_RECOVER 1
00043
00044
00045 #define SIM_ARRAY_RW 0
00046
00047 #define SIM_ARRAY_WO 1
00048
00049
00050 typedef struct {
00051 int cache_size;
00052 int number_of_sets;
00053 int associativity;
00054 int block_size;
00055 } time_parameter_type;
00056
00057 typedef struct {
00058 double access_time,cycle_time;
00059 int best_Ndwl,best_Ndbl;
00060 int best_Nspd;
00061 int best_Ntwl,best_Ntbl;
00062 int best_Ntspd;
00063 double decoder_delay_data,decoder_delay_tag;
00064 double dec_data_driver,dec_data_3to8,dec_data_inv;
00065 double dec_tag_driver,dec_tag_3to8,dec_tag_inv;
00066 double wordline_delay_data,wordline_delay_tag;
00067 double bitline_delay_data,bitline_delay_tag;
00068 double sense_amp_delay_data,sense_amp_delay_tag;
00069 double senseext_driver_delay_data;
00070 double compare_part_delay;
00071 double drive_mux_delay;
00072 double selb_delay;
00073 double data_output_delay;
00074 double drive_valid_delay;
00075 double precharge_delay;
00076 } time_result_type;
00077
00078
00079 typedef struct {
00080 int model;
00081 u_int n_bits;
00082 LIB_Type_max_uint n_chg_output;
00083 LIB_Type_max_uint n_chg_addr;
00084 LIB_Type_max_uint n_chg_l1;
00085 double e_chg_output;
00086 double e_chg_addr;
00087 double e_chg_l1;
00088 u_int n_in_1st;
00089 u_int n_in_2nd;
00090 u_int n_out_0th;
00091 u_int n_out_1st;
00092
00093 LIB_Type_max_uint addr_mask;
00094 } SIM_array_dec_t;
00095
00096 typedef struct {
00097 int model;
00098 int share_rw;
00099 LIB_Type_max_uint n_read;
00100 LIB_Type_max_uint n_write;
00101 double e_read;
00102 double e_write;
00103 double I_static;
00104 } SIM_array_wordline_t;
00105
00106 typedef struct {
00107 int model;
00108 int share_rw;
00109 u_int end;
00110 LIB_Type_max_uint n_col_write;
00111 LIB_Type_max_uint n_col_read;
00112 LIB_Type_max_uint n_col_sel;
00113 double e_col_write;
00114 double e_col_read;
00115 double e_col_sel;
00116 double I_static;
00117 } SIM_array_bitline_t;
00118
00119 typedef struct {
00120 int model;
00121 LIB_Type_max_uint n_access;
00122 double e_access;
00123 } SIM_array_amp_t;
00124
00125 typedef struct {
00126 int model;
00127 u_int n_bits;
00128 u_int assoc;
00129 LIB_Type_max_uint n_access;
00130 LIB_Type_max_uint n_match;
00131 LIB_Type_max_uint n_mismatch;
00132 LIB_Type_max_uint n_miss;
00133 LIB_Type_max_uint n_bit_match;
00134 LIB_Type_max_uint n_bit_mismatch;
00135 LIB_Type_max_uint n_chg_addr;
00136 double e_access;
00137 double e_match;
00138 double e_mismatch;
00139 double e_miss;
00140 double e_bit_match;
00141 double e_bit_mismatch;
00142 double e_chg_addr;
00143
00144 LIB_Type_max_uint comp_mask;
00145 } SIM_array_comp_t;
00146
00147 typedef struct {
00148 int model;
00149 u_int end;
00150 LIB_Type_max_uint n_switch;
00151 double e_switch;
00152 double I_static;
00153 } SIM_array_mem_t;
00154
00155 typedef struct {
00156 int model;
00157 u_int assoc;
00158 LIB_Type_max_uint n_mismatch;
00159 LIB_Type_max_uint n_chg_addr;
00160 double e_mismatch;
00161 double e_chg_addr;
00162 } SIM_array_mux_t;
00163
00164 typedef struct {
00165 int model;
00166 u_int item_width;
00167 LIB_Type_max_uint n_select;
00168 LIB_Type_max_uint n_chg_data;
00169 LIB_Type_max_uint n_out_1;
00170 LIB_Type_max_uint n_out_0;
00171 double e_select;
00172 double e_chg_data;
00173 double e_out_1;
00174 double e_out_0;
00175
00176 LIB_Type_max_uint out_mask;
00177 } SIM_array_out_t;
00178
00179 typedef struct {
00180 int model;
00181 LIB_Type_max_uint n_charge;
00182 double e_charge;
00183 double I_static;
00184 } SIM_array_pre_t;
00185
00186
00187 extern double SIM_array_pre_cap(double width, double length);
00188 extern u_int SIM_array_n_pre_gate(int model);
00189 extern u_int SIM_array_n_pre_drain(int model);
00190
00191
00192 extern void SIM_calculate_time(time_result_type*, time_parameter_type*);
00193
00194
00195 extern int SIM_array_dec_record( SIM_array_dec_t *dec, LIB_Type_max_uint prev_addr, LIB_Type_max_uint curr_addr );
00196 extern int SIM_array_wordline_record( SIM_array_wordline_t *wordline, int rw, LIB_Type_max_uint n_switch );
00197 extern int SIM_array_bitline_record( SIM_array_bitline_t *bitline, int rw, u_int cols, LIB_Type_max_uint old_value, LIB_Type_max_uint new_value );
00198 extern int SIM_array_amp_record( SIM_array_amp_t *amp, u_int cols );
00199 extern int SIM_array_comp_global_record( SIM_array_comp_t *comp, LIB_Type_max_uint prev_value, LIB_Type_max_uint curr_value, int miss );
00200 extern int SIM_array_comp_local_record( SIM_array_comp_t *comp, LIB_Type_max_uint prev_tag, LIB_Type_max_uint curr_tag, LIB_Type_max_uint input, int recover );
00201 extern int SIM_array_mux_record( SIM_array_mux_t *mux, LIB_Type_max_uint prev_addr, LIB_Type_max_uint curr_addr, int miss );
00202 extern int SIM_array_outdrv_global_record( SIM_array_out_t *outdrv, LIB_Type_max_uint data );
00203 extern int SIM_array_outdrv_local_record( SIM_array_out_t *outdrv, LIB_Type_max_uint prev_data, LIB_Type_max_uint curr_data, int recover );
00204 extern int SIM_array_mem_record( SIM_array_mem_t *mem, LIB_Type_max_uint prev_value, LIB_Type_max_uint curr_value, u_int cols );
00205 extern int SIM_array_pre_record( SIM_array_pre_t *pre, LIB_Type_max_uint n_charge );
00206
00207
00208 extern double SIM_array_dec_report(SIM_array_dec_t *dec);
00209 extern double SIM_array_wordline_report(SIM_array_wordline_t *wordline);
00210 extern double SIM_array_bitline_report(SIM_array_bitline_t *bitline);
00211 extern double SIM_array_amp_report(SIM_array_amp_t *amp);
00212 extern double SIM_array_comp_report(SIM_array_comp_t *comp);
00213 extern double SIM_array_mux_report(SIM_array_mux_t *mux);
00214 extern double SIM_array_outdrv_report(SIM_array_out_t *outdrv);
00215 extern double SIM_array_mem_report(SIM_array_mem_t *mem);
00216 extern double SIM_array_pre_report(SIM_array_pre_t *pre);
00217
00218 #endif
00219