00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044 #ifndef __MAT_H__
00045 #define __MAT_H__
00046
00047 #include "McPATcomponent.h"
00048 #include "decoder.h"
00049 #include "wire.h"
00050 #include "subarray.h"
00051
00052 class Mat : public McPATComponent
00053 {
00054 public:
00055 Mat(const DynamicParameter & dyn_p);
00056 ~Mat();
00057 double compute_delays(double inrisetime);
00058 void compute_power_energy();
00059
00060 const DynamicParameter & dp;
00061
00062
00063 Decoder * row_dec;
00064 Decoder * bit_mux_dec;
00065 Decoder * sa_mux_lev_1_dec;
00066 Decoder * sa_mux_lev_2_dec;
00067 PredecBlk * dummy_way_sel_predec_blk1;
00068 PredecBlk * dummy_way_sel_predec_blk2;
00069 PredecBlkDrv * way_sel_drv1;
00070 PredecBlkDrv * dummy_way_sel_predec_blk_drv2;
00071
00072 Predec * r_predec;
00073 Predec * b_mux_predec;
00074 Predec * sa_mux_lev_1_predec;
00075 Predec * sa_mux_lev_2_predec;
00076
00077 Wire * subarray_out_wire;
00078 Driver * bl_precharge_eq_drv;
00079 Driver * cam_bl_precharge_eq_drv;
00080 Driver * ml_precharge_drv;
00081 Driver * sl_precharge_eq_drv;
00082 Driver * sl_data_drv;
00083 Driver * ml_to_ram_wl_drv;
00084
00085
00086 powerDef power_row_decoders;
00087 powerDef power_bit_mux_decoders;
00088 powerDef power_sa_mux_lev_1_decoders;
00089 powerDef power_sa_mux_lev_2_decoders;
00090 powerDef power_fa_cam;
00091 powerDef power_bl_precharge_eq_drv;
00092 powerDef power_subarray_out_drv;
00093 powerDef power_cam_all_active;
00094 powerDef power_searchline_precharge;
00095 powerDef power_matchline_precharge;
00096 powerDef power_ml_to_ram_wl_drv;
00097
00098 double delay_fa_tag, delay_cam;
00099 double delay_before_decoder;
00100 double delay_bitline;
00101 double delay_wl_reset;
00102 double delay_bl_restore;
00103
00104 double delay_searchline;
00105 double delay_matchchline;
00106 double delay_cam_sl_restore;
00107 double delay_cam_ml_reset;
00108 double delay_fa_ram_wl;
00109
00110 double delay_hit_miss_reset;
00111 double delay_hit_miss;
00112
00113 Subarray subarray;
00114 powerDef power_bitline, power_searchline, power_matchline;
00115 double per_bitline_read_energy;
00116 int deg_bl_muxing;
00117 int num_act_mats_hor_dir;
00118 double delay_writeback;
00119 Area cell,cam_cell;
00120 bool is_dram,is_fa, pure_cam, camFlag;
00121 int num_mats;
00122 powerDef power_sa;
00123 double delay_sa;
00124 double leak_power_sense_amps_closed_page_state;
00125 double leak_power_sense_amps_open_page_state;
00126 double delay_subarray_out_drv;
00127 double delay_subarray_out_drv_htree;
00128 double delay_comparator;
00129 powerDef power_comparator;
00130 int num_do_b_mat;
00131 int num_so_b_mat;
00132 int num_sa_subarray;
00133 int num_sa_subarray_search;
00134 double C_bl;
00135
00136 uint32_t num_subarrays_per_mat;
00137 uint32_t num_subarrays_per_row;
00138
00139
00140 private:
00141 double compute_bit_mux_sa_precharge_sa_mux_wr_drv_wr_mux_h();
00142 double width_write_driver_or_write_mux();
00143 double compute_comparators_height(int tagbits, int number_ways_in_mat, double subarray_mem_cell_area_w);
00144 double compute_cam_delay(double inrisetime);
00145 double compute_bitline_delay(double inrisetime);
00146 double compute_sa_delay(double inrisetime);
00147 double compute_subarray_out_drv(double inrisetime);
00148 double compute_comparator_delay(double inrisetime);
00149
00150 int RWP;
00151 int ERP;
00152 int EWP;
00153 int SCHP;
00154 };
00155
00156
00157
00158 #endif