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sst/core/techModels/libORION/SIM_technology_v2.h

00001 /*-------------------------------------------------------------------------
00002  *                             ORION 2.0 
00003  *
00004  *                                              Copyright 2009 
00005  *      Princeton University, and Regents of the University of California 
00006  *                         All Rights Reserved
00007  *
00008  *                         
00009  *  ORION 2.0 was developed by Bin Li at Princeton University and Kambiz Samadi at
00010  *  University of California, San Diego. ORION 2.0 was built on top of ORION 1.0. 
00011  *  ORION 1.0 was developed by Hangsheng Wang, Xinping Zhu and Xuning Chen at 
00012  *  Princeton University.
00013  *
00014  *  If your use of this software contributes to a published paper, we
00015  *  request that you cite our paper that appears on our website 
00016  *  http://www.princeton.edu/~peh/orion.html
00017  *
00018  *  Permission to use, copy, and modify this software and its documentation is
00019  *  granted only under the following terms and conditions.  Both the
00020  *  above copyright notice and this permission notice must appear in all copies
00021  *  of the software, derivative works or modified versions, and any portions
00022  *  thereof, and both notices must appear in supporting documentation.
00023  *
00024  *  This software may be distributed (but not offered for sale or transferred
00025  *  for compensation) to third parties, provided such third parties agree to
00026  *  abide by the terms and conditions of this notice.
00027  *
00028  *  This software is distributed in the hope that it will be useful to the
00029  *  community, but WITHOUT ANY WARRANTY; without even the implied warranty of
00030  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00031  *
00032  *-----------------------------------------------------------------------*/
00033 
00034 #ifndef _SIM_TECHNOLOGY_V2_H
00035 #define _SIM_TECHNOLOGY_V2_H
00036 
00037 #include <sys/types.h>
00038 
00039 /* This file contains parameters for 65nm, 45nm and 32nm */
00040 #if ( PARM(TECH_POINT) <= 90 ) 
00041 #define Vbitpre     (Vdd)   
00042 #define Vbitsense   (0.08)    
00043 
00044 #define SensePowerfactor3 (PARM(Freq))*(Vbitsense)*(Vbitsense)
00045 #define SensePowerfactor2 (PARM(Freq))*(Vbitpre-Vbitsense)*(Vbitpre-Vbitsense)
00046 #define SensePowerfactor  (PARM(Freq))*Vdd*(Vdd/2)
00047 #define SenseEnergyFactor (Vdd*Vdd/2)
00048 
00049 /* scaling factors from 65nm to 45nm and 32nm*/
00050 #if (PARM(TECH_POINT) == 45 && PARM(TRANSISTOR_TYPE) == LVT)
00051 #define SCALE_T (0.9123404) 
00052 #define SCALE_M (0.6442105) 
00053 #define SCALE_S (2.3352694)
00054 #define SCALE_W (0.51) 
00055 #define SCALE_H (0.88) 
00056 #define SCALE_BW (0.73) 
00057 #define SCALE_Crs (0.7) 
00058 #elif (PARM(TECH_POINT) == 45 && PARM(TRANSISTOR_TYPE) == NVT)
00059 #define SCALE_T (0.8233582)
00060 #define SCALE_M (0.6442105)
00061 #define SCALE_S (2.1860558)
00062 #define SCALE_W (0.51) 
00063 #define SCALE_H (0.88) 
00064 #define SCALE_BW (0.73) 
00065 #define SCALE_Crs (0.7) 
00066 #elif (PARM(TECH_POINT) == 45 && PARM(TRANSISTOR_TYPE) == HVT)
00067 #define SCALE_T (0.73437604)
00068 #define SCALE_M (0.6442105)
00069 #define SCALE_S (2.036842)
00070 #define SCALE_W (0.51) 
00071 #define SCALE_H (0.88) 
00072 #define SCALE_BW (0.73) 
00073 #define SCALE_Crs (0.7) 
00074 #elif (PARM(TECH_POINT) == 32 && PARM(TRANSISTOR_TYPE) == LVT)
00075 #define SCALE_T (0.7542128)
00076 #define SCALE_M (0.4863158)
00077 #define SCALE_S (2.9692334)
00078 #define SCALE_W (0.26) 
00079 #define SCALE_H (0.77) 
00080 #define SCALE_BW (0.53) 
00081 #define SCALE_Crs (0.49) 
00082 #elif (PARM(TECH_POINT) == 32 && PARM(TRANSISTOR_TYPE) == NVT)
00083 #define SCALE_T (0.6352095)
00084 #define SCALE_M (0.4863158)
00085 #define SCALE_S (3.1319851)
00086 #define SCALE_W (0.26) 
00087 #define SCALE_H (0.77) 
00088 #define SCALE_BW (0.53) 
00089 #define SCALE_Crs (0.49) 
00090 #elif (PARM(TECH_POINT) == 32 && PARM(TRANSISTOR_TYPE) == HVT)
00091 #define SCALE_T (0.5162063)
00092 #define SCALE_M (0.4863158)
00093 #define SCALE_S (3.294737)
00094 #define SCALE_W (0.26) 
00095 #define SCALE_H (0.77) 
00096 #define SCALE_BW (0.53) 
00097 #define SCALE_Crs (0.49) 
00098 #else /* for 65nm and 90nm */
00099 #define SCALE_T (1)
00100 #define SCALE_M (1)
00101 #define SCALE_S (1)
00102 #define SCALE_W (1)
00103 #define SCALE_H (1)
00104 #define SCALE_BW (1)
00105 #define SCALE_Crs (1)
00106 #endif /* PARM(TECH_POINT) */
00107 
00108 
00109 #if(PARM(TECH_POINT) == 90)
00110 
00111 #define LSCALE 0.125 
00112 #define MSCALE  (LSCALE * .624 / .2250) 
00113 
00114 /* bit width of RAM cell in um */
00115 #define BitWidth    (2.0)      
00116 
00117 /* bit height of RAM cell in um */
00118 #define BitHeight   (2.0)      
00119 
00120 #define Cout        (6.25e-14)      
00121 
00122 #define BitlineSpacing   1.1 
00123 #define WordlineSpacing  1.1 
00124 
00125 #define RegCellHeight    2.8 
00126 #define RegCellWidth     1.9 
00127 
00128 #define Cwordmetal   (1.936e-15) 
00129 #define Cbitmetal    (3.872e-15) 
00130 
00131 #define Cmetal        (Cbitmetal/16)
00132 #define CM2metal      (Cbitmetal/16) 
00133 #define CM3metal      (Cbitmetal/16) 
00134 
00135 /* minimal spacing metal cap per unit length */
00136 #define CCmetal       (0.18608e-15)   
00137 #define CCM2metal     (0.18608e-15) 
00138 #define CCM3metal     (0.18608e-15) 
00139 /* 2x minimal spacing metal cap per unit length */
00140 #define CC2metal      (0.12529e-15)  
00141 #define CC2M2metal    (0.12529e-15)  
00142 #define CC2M3metal    (0.12529e-15) 
00143 /* 3x minimal spacing metal cap per unit length */
00144 #define CC3metal      (0.11059e-15) 
00145 #define CC3M2metal    (0.11059e-15)  
00146 #define CC3M3metal    (0.11059e-15)  
00147 
00148 /* corresponds to clock network*/
00149 #define Clockwire (404.8e-12) 
00150 #define Reswire (36.66e3) 
00151 #define invCap (3.816e-14)   
00152 #define Resout (213.6) 
00153 
00154 /* um */
00155 #define Leff          (0.1) 
00156 /* length unit in um */
00157 #define Lamda         (Leff * 0.5)
00158 
00159 /* fF/um */
00160 #define Cpolywire   (2.6317875e-15) 
00161 
00162 /* ohms*um of channel width */
00163 #define Rnchannelstatic (3225)  
00164 
00165 /* ohms*um of channel width */
00166 #define Rpchannelstatic (7650)  
00167 
00168 #if( PARM(TRANSISTOR_TYPE) == LVT)   //derived from Cacti 5.3
00169 #define Rnchannelon (1716)
00170 #define Rpchannelon (4202)
00171 #elif (PARM(TRANSISTOR_TYPE) == NVT)
00172 #define Rnchannelon (4120)
00173 #define Rpchannelon (10464)
00174 #elif (PARM(TRANSISTOR_TYPE) == HVT)
00175 #define Rnchannelon (4956)
00176 #define Rpchannelon (12092)
00177 #endif
00178 
00179 #define Rbitmetal   (1.38048)   
00180 #define Rwordmetal   (0.945536)     
00181 
00182 #if(PARM(TRANSISTOR_TYPE) == LVT) 
00183 #define Vt      0.237
00184 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00185 #define Vt      0.307
00186 #elif (PARM(TRANSISTOR_TYPE) == HVT)
00187 #define Vt      0.482
00188 #endif
00189 
00190 /* transistor widths in um (as described in Cacti 1.0 tech report, appendix 1) */
00191 #if(PARM(TRANSISTOR_TYPE) == LVT)
00192 #define Wdecdrivep  (12.50) 
00193 #define Wdecdriven  (6.25) 
00194 #define Wdec3to8n   (11.25)
00195 #define Wdec3to8p   (7.5) 
00196 #define WdecNORn    (0.30) 
00197 #define WdecNORp    (1.5)  
00198 #define Wdecinvn    (0.63)
00199 #define Wdecinvp    (1.25)
00200 #define Wdff        (12.29)
00201 
00202 #define Wworddrivemax   (12.50)
00203 #define Wmemcella   (0.35)
00204 #define Wmemcellr   (0.50)
00205 #define Wmemcellw   (0.26)
00206 #define Wmemcellbscale  (2)     
00207 #define Wbitpreequ  (1.25) 
00208 
00209 #define Wbitmuxn    (1.25)
00210 #define WsenseQ1to4 (0.55)
00211 #define Wcompinvp1  (1.25)
00212 #define Wcompinvn1  (0.75)
00213 #define Wcompinvp2  (2.50)
00214 #define Wcompinvn2  (1.50)
00215 #define Wcompinvp3  (5.15)
00216 #define Wcompinvn3  (3.25)
00217 #define Wevalinvp   (2.50)
00218 #define Wevalinvn   (9.45)
00219 
00220 #define Wcompn      (1.25) 
00221 #define Wcompp      (3.75)
00222 #define Wcomppreequ     (5.15)
00223 #define Wmuxdrv12n  (3.75)
00224 #define Wmuxdrv12p  (6.25)
00225 #define WmuxdrvNANDn    (2.50)
00226 #define WmuxdrvNANDp    (10.33)
00227 #define WmuxdrvNORn (7.33)
00228 #define WmuxdrvNORp (10.66)
00229 #define Wmuxdrv3n   (24.85)
00230 #define Wmuxdrv3p   (60.25)
00231 #define Woutdrvseln (1.55)
00232 #define Woutdrvselp (2.33)
00233 #define Woutdrvnandn    (3.27)
00234 #define Woutdrvnandp    (1.25)
00235 #define Woutdrvnorn (0.75)
00236 #define Woutdrvnorp (5.33)
00237 #define Woutdrivern (6.16)
00238 #define Woutdriverp (9.77)
00239 #define Wbusdrvn    (6.16)
00240 #define Wbusdrvp    (10.57)
00241 
00242 #define Wcompcellpd2    (0.33)
00243 #define Wcompdrivern    (50.95)
00244 #define Wcompdriverp    (102.67)
00245 #define Wcomparen2      (5.13)
00246 #define Wcomparen1      (2.5)
00247 #define Wmatchpchg      (1.25)
00248 #define Wmatchinvn      (1.33)
00249 #define Wmatchinvp      (2.77)
00250 #define Wmatchnandn     (2.33)
00251 #define Wmatchnandp     (1.76)
00252 #define Wmatchnorn      (2.66)
00253 #define Wmatchnorp      (1.15)
00254 
00255 #define WSelORn         (1.25)
00256 #define WSelORprequ     (5.15)
00257 #define WSelPn          (1.86)
00258 #define WSelPp          (1.86)
00259 #define WSelEnn         (0.63)
00260 #define WSelEnp         (1.25)
00261 
00262 #define Wsenseextdrv1p  (5.15)
00263 #define Wsenseextdrv1n  (3.05)
00264 #define Wsenseextdrv2p  (25.20)
00265 #define Wsenseextdrv2n  (15.65)
00266 
00267 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00268 #define Wdecdrivep  (11.57) 
00269 #define Wdecdriven  (5.74) 
00270 #define Wdec3to8n   (10.31)
00271 #define Wdec3to8p   (6.87) 
00272 #define WdecNORn    (0.28) 
00273 #define WdecNORp    (1.38)  
00274 #define Wdecinvn    (0.58)
00275 #define Wdecinvp    (1.15)
00276 #define Wdff        (6.57)
00277 
00278 #define Wworddrivemax   (11.57)
00279 #define Wmemcella   (0.33)
00280 #define Wmemcellr   (0.46)
00281 #define Wmemcellw   (0.24)
00282 #define Wmemcellbscale  (2)     
00283 #define Wbitpreequ  (1.15) 
00284 
00285 #define Wbitmuxn    (1.15)
00286 #define WsenseQ1to4 (0.49)
00287 #define Wcompinvp1  (1.17)
00288 #define Wcompinvn1  (0.69)
00289 #define Wcompinvp2  (2.29)
00290 #define Wcompinvn2  (1.38)
00291 #define Wcompinvp3  (4.66)
00292 #define Wcompinvn3  (2.88)
00293 #define Wevalinvp   (2.29)
00294 #define Wevalinvn   (8.89)
00295 
00296 #define Wcompn      (1.15) 
00297 #define Wcompp      (3.44)
00298 #define Wcomppreequ     (4.66)
00299 #define Wmuxdrv12n  (3.44)
00300 #define Wmuxdrv12p  (5.74)
00301 #define WmuxdrvNANDn    (2.29)
00302 #define WmuxdrvNANDp    (9.33)
00303 #define WmuxdrvNORn (6.79)
00304 #define WmuxdrvNORp (9.49)
00305 #define Wmuxdrv3n   (22.83)
00306 #define Wmuxdrv3p   (55.09)
00307 #define Woutdrvseln (1.40)
00308 #define Woutdrvselp (2.21)
00309 #define Woutdrvnandn    (2.89)
00310 #define Woutdrvnandp    (1.15)
00311 #define Woutdrvnorn (0.69)
00312 #define Woutdrvnorp (4.75)
00313 #define Woutdrivern (5.58)
00314 #define Woutdriverp (9.05)
00315 #define Wbusdrvn    (5.58)
00316 #define Wbusdrvp    (9.45)
00317 
00318 #define Wcompcellpd2    (0.29)
00319 #define Wcompdrivern    (46.28)
00320 #define Wcompdriverp    (92.94)
00321 #define Wcomparen2      (4.65)
00322 #define Wcomparen1      (2.29)
00323 #define Wmatchpchg      (1.15)
00324 #define Wmatchinvn      (1.19)
00325 #define Wmatchinvp      (2.43)
00326 #define Wmatchnandn     (2.21)
00327 #define Wmatchnandp     (1.42)
00328 #define Wmatchnorn      (2.37)
00329 #define Wmatchnorp      (1.10)
00330 
00331 #define WSelORn         (1.15)
00332 #define WSelORprequ     (4.66)
00333 #define WSelPn          (1.45)
00334 #define WSelPp          (1.71)
00335 #define WSelEnn         (0.58)
00336 #define WSelEnp         (1.15)
00337 
00338 #define Wsenseextdrv1p  (4.66)
00339 #define Wsenseextdrv1n  (2.78)
00340 #define Wsenseextdrv2p  (23.02)
00341 #define Wsenseextdrv2n  (14.07)
00342 
00343 #elif(PARM(TRANSISTOR_TYPE) == HVT)
00344 #define Wdecdrivep  (10.64) 
00345 #define Wdecdriven  (5.23) 
00346 #define Wdec3to8n   (9.36)
00347 #define Wdec3to8p   (6.24) 
00348 #define WdecNORn    (0.25) 
00349 #define WdecNORp    (1.25)  
00350 #define Wdecinvn    (0.52)
00351 #define Wdecinvp    (1.04)
00352 #define Wdff        (5.43)
00353 
00354 #define Wworddrivemax   (10.64)
00355 #define Wmemcella   (0.25)
00356 #define Wmemcellr   (0.42)
00357 #define Wmemcellw   (0.22)
00358 #define Wmemcellbscale  (2)     
00359 #define Wbitpreequ  (1.04) 
00360 
00361 #define Wbitmuxn    (1.04)
00362 #define WsenseQ1to4 (0.42)
00363 #define Wcompinvp1  (1.08)
00364 #define Wcompinvn1  (0.62)
00365 #define Wcompinvp2  (2.08)
00366 #define Wcompinvn2  (1.25)
00367 #define Wcompinvp3  (4.16)
00368 #define Wcompinvn3  (2.50)
00369 #define Wevalinvp   (2.08)
00370 #define Wevalinvn   (8.32)
00371 
00372 #define Wcompn      (1.04) 
00373 #define Wcompp      (3.12)
00374 #define Wcomppreequ     (4.16)
00375 #define Wmuxdrv12n  (3.12)
00376 #define Wmuxdrv12p  (5.23)
00377 #define WmuxdrvNANDn    (2.08)
00378 #define WmuxdrvNANDp    (8.32)
00379 #define WmuxdrvNORn (6.24)
00380 #define WmuxdrvNORp (8.32)
00381 #define Wmuxdrv3n   (20.80)
00382 #define Wmuxdrv3p   (49.92)
00383 #define Woutdrvseln (1.25)
00384 #define Woutdrvselp (2.08)
00385 #define Woutdrvnandn    (2.50)
00386 #define Woutdrvnandp    (1.04)
00387 #define Woutdrvnorn (0.62)
00388 #define Woutdrvnorp (4.16)
00389 #define Woutdrivern (4.99)
00390 #define Woutdriverp (8.32)
00391 #define Wbusdrvn    (4.99)
00392 #define Wbusdrvp    (8.32)
00393 
00394 #define Wcompcellpd2    (0.25)
00395 #define Wcompdrivern    (41.60)
00396 #define Wcompdriverp    (83.20)
00397 #define Wcomparen2      (4.16)
00398 #define Wcomparen1      (2.08)
00399 #define Wmatchpchg      (1.04)
00400 #define Wmatchinvn      (1.04)
00401 #define Wmatchinvp      (2.08)
00402 #define Wmatchnandn     (2.08)
00403 #define Wmatchnandp     (1.08)
00404 #define Wmatchnorn      (2.08)
00405 #define Wmatchnorp      (1.04)
00406 
00407 #define WSelORn         (1.04)
00408 #define WSelORprequ     (4.16)
00409 #define WSelPn          (1.04)
00410 #define WSelPp          (1.56)
00411 #define WSelEnn         (0.52)
00412 #define WSelEnp         (1.04)
00413 
00414 #define Wsenseextdrv1p  (4.16)
00415 #define Wsenseextdrv1n  (2.50)
00416 #define Wsenseextdrv2p  (20.83)
00417 #define Wsenseextdrv2n  (12.48)
00418 
00419 #endif /* 90nm PARM(TRANSISTOR_TYPE)*/
00420 
00421 #define CamCellHeight    (4.095)   /*derived from Cacti 5.3 */ 
00422 #define CamCellWidth     (3.51)    /*derived from Cacti 5.3 */ 
00423 
00424 #define MatchlineSpacing (0.75) 
00425 #define TaglineSpacing   (0.75) 
00426 
00427 #define CrsbarCellHeight 2.94   
00428 #define CrsbarCellWidth  2.94   
00429 
00430 #define krise       (0.5e-10)     
00431 #define tsensedata  (0.725e-10)    
00432 #define tsensetag   (0.325e-10)   
00433 #define tfalldata   (0.875e-10)  
00434 #define tfalltag    (0.875e-10) 
00435 
00436 /*=============Above are the parameters for 90nm ========================*/
00437 
00438 /*=============Below are the parameters for 65nm ========================*/
00439 #elif(PARM(TECH_POINT) <= 65) 
00440 
00441 #define LSCALE 0.087 
00442 #define MSCALE  (LSCALE * .624 / .2250) 
00443 
00444 /* bit width of RAM cell in um */
00445 #define BitWidth    (1.4)      
00446 
00447 /* bit height of RAM cell in um */
00448 #define BitHeight   (1.4)     
00449 
00450 #define Cout        (4.35e-14) 
00451 
00452 /* Sizing of cells and spacings */
00453 #define BitlineSpacing   (0.8 * SCALE_BW)
00454 #define WordlineSpacing  (0.8 * SCALE_BW)
00455 
00456 #define RegCellHeight    (2.1 * SCALE_H)
00457 #define RegCellWidth     (1.4 * SCALE_W)
00458 
00459 #define Cwordmetal    (1.63e-15 * SCALE_M)  
00460 #define Cbitmetal     (3.27e-15 * SCALE_M)  
00461 
00462 #define Cmetal        (Cbitmetal/16)
00463 #define CM2metal      (Cbitmetal/16) 
00464 #define CM3metal      (Cbitmetal/16) 
00465 
00466 // minimum spacing
00467 #define CCmetal       (0.146206e-15) 
00468 #define CCM2metal     (0.146206e-15)  
00469 #define CCM3metal     (0.146206e-15)  
00470 // 2x minimum spacing
00471 #define CC2metal      (0.09844e-15) 
00472 #define CC2M2metal    (0.09844e-15)  
00473 #define CC2M3metal    (0.09844e-15)  
00474 // 3x minimum spacing
00475 #define CC3metal      (0.08689e-15) 
00476 #define CC3M2metal    (0.08689e-15)  
00477 #define CC3M3metal    (0.08689e-15)  
00478 
00479 
00480 /* corresponds to clock network*/
00481 #define Clockwire (323.4e-12 * SCALE_M) 
00482 #define Reswire (61.11e3 * (1/SCALE_M)) 
00483 #define invCap (3.12e-14) 
00484 #define Resout (361.00)    
00485 
00486 /* um */
00487 #define Leff          (0.0696)  
00488 /* length unit in um */
00489 #define Lamda         (Leff * 0.5)
00490 
00491 /* fF/um */
00492 #define Cpolywire   (1.832e-15)  
00493 /* ohms*um of channel width */
00494 #define Rnchannelstatic (2244.6)  
00495 
00496 /* ohms*um of channel width */
00497 #define Rpchannelstatic (5324.4)  
00498 
00499 #if(PARM(TRANSISTOR_TYPE) == LVT)   /* derived from Cacti 5.3 */
00500 #define Rnchannelon (1370)
00501 #define Rpchannelon (3301)
00502 #elif (PARM(TRANSISTOR_TYPE) == NVT)
00503 #define Rnchannelon (2540)
00504 #define Rpchannelon (5791)
00505 #elif (PARM(TRANSISTOR_TYPE) == HVT)
00506 #define Rnchannelon (4530)
00507 #define Rpchannelon (10101)
00508 #endif
00509 
00510 #define Rbitmetal   (1.92644)   /* derived from Cacti 5.3 */  
00511 #define Rwordmetal   (1.31948)  /* derived from Cacti 5.3 */
00512 
00513 #if(PARM(TRANSISTOR_TYPE) == LVT) 
00514 #define Vt      0.195     
00515 #elif (PARM(TRANSISTOR_TYPE) == NVT)
00516 #define Vt      0.285
00517 #elif (PARM(TRANSISTOR_TYPE) == HVT)
00518 #define Vt      0.524
00519 #endif
00520 
00521 /* transistor widths in um for 65nm. (as described in Cacti 1.0 tech report, appendix 1) */
00522 #if(PARM(TRANSISTOR_TYPE) == LVT)  
00523 #define Wdecdrivep      (8.27) 
00524 #define Wdecdriven      (6.70)
00525 #define Wdec3to8n       (2.33) 
00526 #define Wdec3to8p       (2.33)
00527 #define WdecNORn        (1.50)
00528 #define WdecNORp        (3.82)
00529 #define Wdecinvn        (8.46)
00530 #define Wdecinvp        (10.93)
00531 #define Wdff            (8.6)
00532 
00533 #define Wworddrivemax   (9.27)
00534 #define Wmemcella   (0.2225)
00535 #define Wmemcellr   (0.3708)
00536 #define Wmemcellw   (0.1947)
00537 #define Wmemcellbscale  (1.87)      
00538 #define Wbitpreequ  (0.927)
00539 
00540 #define Wbitmuxn    (0.927)
00541 #define WsenseQ1to4 (0.371)
00542 #define Wcompinvp1  (0.927)
00543 #define Wcompinvn1  (0.5562)
00544 #define Wcompinvp2  (1.854)
00545 #define Wcompinvn2  (1.1124)
00546 #define Wcompinvp3  (3.708)
00547 #define Wcompinvn3  (2.2248)
00548 #define Wevalinvp   (1.854)
00549 #define Wevalinvn   (7.416)
00550 
00551 
00552 #define Wcompn      (1.854)
00553 #define Wcompp      (2.781)
00554 #define Wcomppreequ (3.712)
00555 #define Wmuxdrv12n  (2.785)
00556 #define Wmuxdrv12p  (4.635)
00557 #define WmuxdrvNANDn (1.860)
00558 #define WmuxdrvNANDp (7.416)
00559 #define WmuxdrvNORn (5.562)
00560 #define WmuxdrvNORp (7.416)
00561 #define Wmuxdrv3n   (18.54)
00562 #define Wmuxdrv3p   (44.496)
00563 #define Woutdrvseln (1.112)
00564 #define Woutdrvselp (1.854)
00565 #define Woutdrvnandn    (2.225)
00566 #define Woutdrvnandp    (0.927)
00567 #define Woutdrvnorn (0.5562)
00568 #define Woutdrvnorp (3.708)
00569 #define Woutdrivern (4.450)
00570 #define Woutdriverp (7.416)
00571 #define Wbusdrvn    (4.450)
00572 #define Wbusdrvp    (7.416)
00573 
00574 #define Wcompcellpd2    (0.222)
00575 #define Wcompdrivern    (37.08)
00576 #define Wcompdriverp    (74.20)
00577 #define Wcomparen2      (3.708)
00578 #define Wcomparen1      (1.854)
00579 #define Wmatchpchg      (0.927)
00580 #define Wmatchinvn      (0.930)
00581 #define Wmatchinvp      (1.854)
00582 #define Wmatchnandn     (1.854)
00583 #define Wmatchnandp     (0.927)
00584 #define Wmatchnorn      (1.860)
00585 #define Wmatchnorp      (0.930)
00586 
00587 #define WSelORn         (0.930)
00588 #define WSelORprequ     (3.708)
00589 #define WSelPn          (0.927)
00590 #define WSelPp          (1.391)
00591 #define WSelEnn         (0.434)
00592 #define WSelEnp         (0.930)
00593 
00594 #define Wsenseextdrv1p  (3.708)
00595 #define Wsenseextdrv1n  (2.225)
00596 #define Wsenseextdrv2p  (18.54)
00597 #define Wsenseextdrv2n  (11.124)
00598 
00599 #elif (PARM(TRANSISTOR_TYPE) == NVT) 
00600 #define Wdecdrivep      (6.7) 
00601 #define Wdecdriven      (4.7)
00602 #define Wdec3to8n       (1.33) 
00603 #define Wdec3to8p       (1.33)
00604 #define WdecNORn        (1.20)
00605 #define WdecNORp        (2.62)
00606 #define Wdecinvn        (1.46)
00607 #define Wdecinvp        (3.93)
00608 #define Wdff            (4.6)
00609 
00610 #define Wworddrivemax   (9.225)
00611 #define Wmemcella   (0.221)
00612 #define Wmemcellr   (0.369)
00613 #define Wmemcellw   (0.194)
00614 #define Wmemcellbscale  1.87       
00615 #define Wbitpreequ  (0.923)
00616 
00617 #define Wbitmuxn    (0.923)
00618 #define WsenseQ1to4 (0.369)
00619 #define Wcompinvp1  (0.924)
00620 #define Wcompinvn1  (0.554)
00621 #define Wcompinvp2  (1.845)
00622 #define Wcompinvn2  (1.107)
00623 #define Wcompinvp3  (3.69)
00624 #define Wcompinvn3  (2.214)
00625 #define Wevalinvp   (1.842)
00626 #define Wevalinvn   (7.368)
00627 
00628 #define Wcompn      (1.845)
00629 #define Wcompp      (2.768)
00630 #define Wcomppreequ     (3.692)
00631 #define Wmuxdrv12n  (2.773)
00632 #define Wmuxdrv12p  (4.618)
00633 #define WmuxdrvNANDn    (1.848)
00634 #define WmuxdrvNANDp    (7.38)
00635 #define WmuxdrvNORn (5.535)
00636 #define WmuxdrvNORp (7.380)
00637 #define Wmuxdrv3n   (18.45)
00638 #define Wmuxdrv3p   (44.28)
00639 #define Woutdrvseln (1.105)
00640 #define Woutdrvselp (1.842)
00641 #define Woutdrvnandn    (2.214)
00642 #define Woutdrvnandp    (0.923)
00643 #define Woutdrvnorn (0.554)
00644 #define Woutdrvnorp (3.69)
00645 #define Woutdrivern (4.428)
00646 #define Woutdriverp (7.380)
00647 #define Wbusdrvn    (4.421)
00648 #define Wbusdrvp    (7.368)
00649 
00650 #define Wcompcellpd2    (0.221)
00651 #define Wcompdrivern    (36.84)
00652 #define Wcompdriverp    (73.77)
00653 #define Wcomparen2      (3.684)
00654 #define Wcomparen1      (1.842)
00655 #define Wmatchpchg      (0.921)
00656 #define Wmatchinvn      (0.923)
00657 #define Wmatchinvp      (1.852)
00658 #define Wmatchnandn     (1.852)
00659 #define Wmatchnandp     (0.921)
00660 #define Wmatchnorn      (1.845)
00661 #define Wmatchnorp      (0.923)
00662 
00663 #define WSelORn         (0.923)
00664 #define WSelORprequ     (3.684)
00665 #define WSelPn          (0.921)
00666 #define WSelPp          (1.382)
00667 #define WSelEnn         (0.446)
00668 #define WSelEnp         (0.923)
00669 
00670 #define Wsenseextdrv1p  (3.684)
00671 #define Wsenseextdrv1n  (2.211)
00672 #define Wsenseextdrv2p  (18.42)
00673 #define Wsenseextdrv2n  (11.052)
00674 
00675 #elif (PARM(TRANSISTOR_TYPE) == HVT)  
00676 #define Wdecdrivep      (3.11) 
00677 #define Wdecdriven      (1.90)
00678 #define Wdec3to8n       (1.33) 
00679 #define Wdec3to8p       (1.33)
00680 #define WdecNORn        (0.90)
00681 #define WdecNORp        (1.82)
00682 #define Wdecinvn        (0.46)
00683 #define Wdecinvp        (0.93)
00684 #define Wdff            (3.8)
00685 
00686 #define Wworddrivemax   (9.18)
00687 #define Wmemcella   (0.220)
00688 #define Wmemcellr   (0.367)
00689 #define Wmemcellw   (0.193)
00690 #define Wmemcellbscale  1.87       
00691 #define Wbitpreequ  (0.918)
00692 
00693 #define Wbitmuxn    (0.918)
00694 #define WsenseQ1to4 (0.366)
00695 #define Wcompinvp1  (0.920)
00696 #define Wcompinvn1  (0.551)
00697 #define Wcompinvp2  (1.836)
00698 #define Wcompinvn2  (1.102)
00699 #define Wcompinvp3  (3.672)
00700 #define Wcompinvn3  (2.203)
00701 #define Wevalinvp   (1.83)
00702 #define Wevalinvn   (7.32)
00703 
00704 #define Wcompn      (1.836)
00705 #define Wcompp      (2.754)
00706 #define Wcomppreequ (3.672)
00707 #define Wmuxdrv12n  (2.760)
00708 #define Wmuxdrv12p  (4.60)
00709 #define WmuxdrvNANDn    (1.836)
00710 #define WmuxdrvNANDp    (7.344)
00711 #define WmuxdrvNORn (5.508)
00712 #define WmuxdrvNORp (7.344)
00713 #define Wmuxdrv3n   (18.36)
00714 #define Wmuxdrv3p   (44.064)
00715 #define Woutdrvseln (1.098)
00716 #define Woutdrvselp (1.83)
00717 #define Woutdrvnandn    (2.203)
00718 #define Woutdrvnandp    (0.918)
00719 #define Woutdrvnorn (0.551)
00720 #define Woutdrvnorp (3.672)
00721 #define Woutdrivern (4.406)
00722 #define Woutdriverp (7.344)
00723 #define Wbusdrvn    (4.392)
00724 #define Wbusdrvp    (7.32)
00725 
00726 #define Wcompcellpd2    (0.220)
00727 #define Wcompdrivern    (36.6)
00728 #define Wcompdriverp    (73.33)
00729 #define Wcomparen2      (3.66)
00730 #define Wcomparen1      (1.83)
00731 #define Wmatchpchg      (0.915)
00732 #define Wmatchinvn      (0.915)
00733 #define Wmatchinvp      (1.85)
00734 #define Wmatchnandn     (1.85)
00735 #define Wmatchnandp     (0.915)
00736 #define Wmatchnorn      (1.83)
00737 #define Wmatchnorp      (0.915)
00738 
00739 #define WSelORn         (0.915)
00740 #define WSelORprequ     (3.66)
00741 #define WSelPn          (0.915)
00742 #define WSelPp          (1.373)
00743 #define WSelEnn         (0.458)
00744 #define WSelEnp         (0.915)
00745 
00746 #define Wsenseextdrv1p  (3.66)
00747 #define Wsenseextdrv1n  (2.196)
00748 #define Wsenseextdrv2p  (18.3)
00749 #define Wsenseextdrv2n  (10.98)
00750 
00751 #endif /* PARM(TRANSISTOR_TYPE) */
00752 
00753 #define CamCellHeight    (2.9575)       /* derived from Cacti 5.3 */ 
00754 #define CamCellWidth     (2.535)    /* derived from Cacti 5.3 */
00755 
00756 #define MatchlineSpacing (0.522)   
00757 #define TaglineSpacing   (0.522)   
00758 
00759 #define CrsbarCellHeight (2.06 * SCALE_Crs)   
00760 #define CrsbarCellWidth  (2.06 * SCALE_Crs)  
00761 
00762 #define krise       (0.348e-10) 
00763 #define tsensedata  (0.5046e-10)   
00764 #define tsensetag   (0.2262e-10)  
00765 #define tfalldata   (0.609e-10)  
00766 #define tfalltag    (0.6609e-10) 
00767 
00768 #endif /* PARM(TECH_POINT) */
00769 
00770 /*=======================PARAMETERS for Link===========================*/
00771 
00772 #if(PARM(TECH_POINT) == 90) /* PARAMETERS for Link at 90nm */
00773 #if (WIRE_LAYER_TYPE == LOCAL)
00774 #define WireMinWidth            214e-9
00775 #define WireMinSpacing          214e-9
00776 #define WireMetalThickness      363.8e-9
00777 #define WireBarrierThickness    10e-9
00778 #define WireDielectricThickness 363.8e-9
00779 #define WireDielectricConstant  3.3
00780 
00781 #elif (WIRE_LAYER_TYPE == INTERMEDIATE)
00782 #define WireMinWidth            275e-9
00783 #define WireMinSpacing          275e-9
00784 #define WireMetalThickness      467.5e-9
00785 #define WireBarrierThickness    10e-9
00786 #define WireDielectricThickness 412.5e-9
00787 #define WireDielectricConstant  3.3
00788 
00789 #elif (WIRE_LAYER_TYPE == GLOBAL)
00790 #define WireMinWidth            410e-9 
00791 #define WireMinSpacing          410e-9
00792 #define WireMetalThickness      861e-9 
00793 #define WireBarrierThickness    10e-9
00794 #define WireDielectricThickness 779e-9 
00795 #define WireDielectricConstant  3.3
00796 
00797 #endif /*WIRE_LAYER_TYPE for 90nm*/
00798 
00799 #elif(PARM(TECH_POINT) == 65) /* PARAMETERS for Link at 65nm */
00800 #if (WIRE_LAYER_TYPE == LOCAL)
00801 #define WireMinWidth                136e-9
00802 #define WireMinSpacing              136e-9
00803 #define WireMetalThickness          231.2e-9
00804 #define WireBarrierThickness        4.8e-9
00805 #define WireDielectricThickness     231.2e-9
00806 #define WireDielectricConstant      2.85
00807 
00808 #elif (WIRE_LAYER_TYPE == INTERMEDIATE)
00809 #define WireMinWidth                140e-9
00810 #define WireMinSpacing              140e-9
00811 #define WireMetalThickness          252e-9
00812 #define WireBarrierThickness        5.2e-9
00813 #define WireDielectricThickness     224e-9
00814 #define WireDielectricConstant      2.85
00815 
00816 #elif (WIRE_LAYER_TYPE == GLOBAL)
00817 #define WireMinWidth                400e-9 
00818 #define WireMinSpacing              400e-9
00819 #define WireMetalThickness          400e-9 
00820 #define WireBarrierThickness        5.2e-9
00821 #define WireDielectricThickness     790e-9 
00822 #define WireDielectricConstant      2.9
00823 
00824 #endif /*WIRE_LAYER_TYPE for 65nm*/
00825 
00826 #elif(PARM(TECH_POINT) == 45) /* PARAMETERS for Link at 45nm */
00827 #if (WIRE_LAYER_TYPE == LOCAL)
00828 #define WireMinWidth                    45e-9
00829 #define WireMinSpacing                  45e-9
00830 #define WireMetalThickness              129.6e-9
00831 #define WireBarrierThickness            3.3e-9
00832 #define WireDielectricThickness         162e-9
00833 #define WireDielectricConstant          2.0
00834 
00835 #elif (WIRE_LAYER_TYPE == INTERMEDIATE)
00836 #define WireMinWidth                45e-9  
00837 #define WireMinSpacing              45e-9       
00838 #define WireMetalThickness          129.6e-9
00839 #define WireBarrierThickness        3.3e-9
00840 #define WireDielectricThickness     72e-9       
00841 #define WireDielectricConstant      2.0
00842 
00843 #elif (WIRE_LAYER_TYPE == GLOBAL)
00844 #define WireMinWidth                67.5e-9 
00845 #define WireMinSpacing              67.5e-9
00846 #define WireMetalThickness          155.25e-9 
00847 #define WireBarrierThickness        3.3e-9
00848 #define WireDielectricThickness     141.75e-9 
00849 #define WireDielectricConstant      2.0
00850 
00851 #endif /*WIRE_LAYER_TYPE for 45nm*/
00852 
00853 #elif(PARM(TECH_POINT) == 32) /* PARAMETERS for Link at 32nm */
00854 #if (WIRE_LAYER_TYPE == LOCAL)
00855 #define WireMinWidth                    32e-9
00856 #define WireMinSpacing                  32e-9
00857 #define WireMetalThickness              60.8e-9
00858 #define WireBarrierThickness            2.4e-9
00859 #define WireDielectricThickness         60.8e-9
00860 #define WireDielectricConstant          1.9
00861 
00862 #elif (WIRE_LAYER_TYPE == INTERMEDIATE)
00863 #define WireMinWidth                32e-9
00864 #define WireMinSpacing              32e-9
00865 #define WireMetalThickness          60.8e-9
00866 #define WireBarrierThickness        2.4e-9
00867 #define WireDielectricThickness     54.4e-9 
00868 #define WireDielectricConstant      1.9
00869 
00870 #elif (WIRE_LAYER_TYPE == GLOBAL)
00871 #define WireMinWidth                48e-9 
00872 #define WireMinSpacing              48e-9
00873 #define WireMetalThickness          120e-9 
00874 #define WireBarrierThickness        2.4e-9
00875 #define WireDielectricThickness     110.4e-9 
00876 #define WireDielectricConstant      1.9
00877 
00878 #endif /* WIRE_LAYER_TYPE for 32nm*/
00879 
00880 #endif /* PARM(TECH_POINT) */
00881 
00882 /*===================================================================*/
00883 /*parameters for insertion buffer for links at 90nm*/
00884 #if(PARM(TECH_POINT) == 90)
00885 #define BufferDriveResistance       5.12594e+03
00886 #define BufferIntrinsicDelay        4.13985e-11
00887 #if(PARM(TRANSISTOR_TYPE) == LVT)
00888 #define BufferInputCapacitance      1.59e-15
00889 #define BufferPMOSOffCurrent        116.2e-09 
00890 #define BufferNMOSOffCurrent        52.1e-09  
00891 #define ClockCap                    2.7e-14
00892 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00893 #define BufferInputCapacitance      4.7e-15
00894 #define BufferPMOSOffCurrent        67.6e-09 
00895 #define BufferNMOSOffCurrent        31.1e-09  
00896 #define ClockCap                    1.0e-14
00897 #elif(PARM(TRANSISTOR_TYPE) == HVT)
00898 #define BufferInputCapacitance      15.0e-15//9.5e-15
00899 #define BufferPMOSOffCurrent        19.2e-09 
00900 #define BufferNMOSOffCurrent        10.1e-09  
00901 #define ClockCap                    0.3e-15
00902 #endif
00903 /*parameters for insertion buffer for links at 65nm*/
00904 #elif(PARM(TECH_POINT) == 65)
00905 #define BufferDriveResistance       6.77182e+03
00906 #define BufferIntrinsicDelay        3.31822e-11 
00907 #if(PARM(TRANSISTOR_TYPE) == LVT)
00908 #define BufferPMOSOffCurrent        317.2e-09 
00909 #define BufferNMOSOffCurrent        109.7e-09
00910 #define BufferInputCapacitance      1.3e-15 
00911 #define ClockCap                    2.6e-14
00912 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00913 #define BufferPMOSOffCurrent        113.1e-09 
00914 #define BufferNMOSOffCurrent        67.3e-09 
00915 #define BufferInputCapacitance      2.6e-15
00916 #define ClockCap                    1.56e-14
00917 #elif(PARM(TRANSISTOR_TYPE) == HVT)
00918 #define BufferPMOSOffCurrent        35.2e-09 
00919 #define BufferNMOSOffCurrent        18.4e-09 
00920 #define BufferInputCapacitance      7.8e-15
00921 #define ClockCap                    0.9e-15
00922 #endif
00923 
00924 /*parameters for insertion buffer for links at 45nm*/
00925 #elif(PARM(TECH_POINT) == 45)
00926 #define BufferDriveResistance       7.3228e+03
00927 #define BufferIntrinsicDelay        4.6e-11
00928 #if(PARM(TRANSISTOR_TYPE) == LVT)
00929 #define BufferInputCapacitance      1.25e-15
00930 #define BufferPMOSOffCurrent        1086.75e-09 
00931 #define BufferNMOSOffCurrent        375.84e-09 
00932 #define ClockCap                    2.5e-14
00933 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00934 #define BufferInputCapacitance      2.5e-15     
00935 #define BufferPMOSOffCurrent        382.3e-09 
00936 #define BufferNMOSOffCurrent        195.5e-09 
00937 #define ClockCap                    1.5e-14
00938 #elif(PARM(TRANSISTOR_TYPE) == HVT)
00939 #define BufferInputCapacitance      7.5e-15
00940 #define BufferPMOSOffCurrent        76.4e-09 
00941 #define BufferNMOSOffCurrent        39.1e-09 
00942 #define ClockCap                    0.84e-15
00943 #endif
00944 /*parameters for insertion buffer for links at 32nm*/
00945 #elif(PARM(TECH_POINT) == 32)
00946 #define BufferDriveResistance       10.4611e+03
00947 #define BufferIntrinsicDelay        4.0e-11
00948 #if(PARM(TRANSISTOR_TYPE) == LVT)
00949 #define BufferPMOSOffCurrent        1630.08e-09 
00950 #define BufferNMOSOffCurrent        563.74e-09
00951 #define BufferInputCapacitance      1.2e-15 
00952 #define ClockCap                    2.2e-14
00953 #elif(PARM(TRANSISTOR_TYPE) == NVT)
00954 #define BufferPMOSOffCurrent        792.4e-09 
00955 #define BufferNMOSOffCurrent        405.1e-09
00956 #define BufferInputCapacitance      2.4e-15 
00957 #define ClockCap                    1.44e-14
00958 #elif(PARM(TRANSISTOR_TYPE) == HVT)
00959 #define BufferPMOSOffCurrent        129.9e-09 
00960 #define BufferNMOSOffCurrent        66.4e-09
00961 #define BufferInputCapacitance      7.2e-15 
00962 #define ClockCap                    0.53e-15
00963 #endif
00964 #endif /*PARM(TECH_POINT)*/
00965 
00966 
00967 /*======================Parameters for Area===========================*/
00968 #if(PARM(TECH_POINT) == 90)
00969 #define AreaNOR         (4.23)  
00970 #define AreaINV         (2.82)  
00971 #define AreaAND         (4.23)  
00972 #define AreaDFF         (16.23) 
00973 #define AreaMUX2        (7.06)  
00974 #define AreaMUX3        (11.29) 
00975 #define AreaMUX4        (16.93) 
00976 #elif(PARM(TECH_POINT) <= 65)
00977 #define AreaNOR     (2.52 * SCALE_T)   
00978 #define AreaINV     (1.44 * SCALE_T)  
00979 #define AreaDFF     (8.28 * SCALE_T) 
00980 #define AreaAND     (2.52 * SCALE_T)  
00981 #define AreaMUX2    (6.12 * SCALE_T)  
00982 #define AreaMUX3    (9.36 * SCALE_T) 
00983 #define AreaMUX4    (12.6 * SCALE_T) 
00984 #endif
00985 
00986 #endif /* PARM(TECH_POINT) <= 90 */
00987 
00988 #endif /* _SIM_POWER_V2_H */

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