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00024 #ifndef KQEMU_H
00025 #define KQEMU_H
00026
00027 #if defined(__i386__)
00028 #define KQEMU_PAD32(x) x
00029 #else
00030 #define KQEMU_PAD32(x)
00031 #endif
00032
00033 #define KQEMU_VERSION 0x010400
00034
00035 struct kqemu_segment_cache {
00036 uint16_t selector;
00037 uint16_t padding1;
00038 uint32_t flags;
00039 uint64_t base;
00040 uint32_t limit;
00041 uint32_t padding2;
00042 };
00043
00044 struct kqemu_cpu_state {
00045 uint64_t regs[16];
00046 uint64_t eip;
00047 uint64_t eflags;
00048
00049 struct kqemu_segment_cache segs[6];
00050 struct kqemu_segment_cache ldt;
00051 struct kqemu_segment_cache tr;
00052 struct kqemu_segment_cache gdt;
00053 struct kqemu_segment_cache idt;
00054
00055 uint64_t cr0;
00056 uint64_t cr2;
00057 uint64_t cr3;
00058 uint64_t cr4;
00059 uint64_t a20_mask;
00060
00061
00062 uint64_t sysenter_cs;
00063 uint64_t sysenter_esp;
00064 uint64_t sysenter_eip;
00065 uint64_t efer;
00066 uint64_t star;
00067
00068 uint64_t lstar;
00069 uint64_t cstar;
00070 uint64_t fmask;
00071 uint64_t kernelgsbase;
00072
00073 uint64_t tsc_offset;
00074
00075 uint64_t dr0;
00076 uint64_t dr1;
00077 uint64_t dr2;
00078 uint64_t dr3;
00079 uint64_t dr6;
00080 uint64_t dr7;
00081
00082 uint8_t cpl;
00083 uint8_t user_only;
00084 uint16_t padding1;
00085
00086 uint32_t error_code;
00087 uint64_t next_eip;
00088 uint32_t nb_pages_to_flush;
00089
00090 #define KQEMU_MAX_PAGES_TO_FLUSH 512
00091 #define KQEMU_FLUSH_ALL (KQEMU_MAX_PAGES_TO_FLUSH + 1)
00092
00093 int32_t retval;
00094
00095
00096 uint32_t nb_ram_pages_to_update;
00097 #define KQEMU_MAX_RAM_PAGES_TO_UPDATE 512
00098 #define KQEMU_RAM_PAGES_UPDATE_ALL (KQEMU_MAX_RAM_PAGES_TO_UPDATE + 1)
00099
00100 #define KQEMU_MAX_MODIFIED_RAM_PAGES 512
00101 uint32_t nb_modified_ram_pages;
00102 };
00103
00104 struct kqemu_init {
00105 uint8_t *ram_base;
00106 KQEMU_PAD32(uint32_t padding1;)
00107 uint64_t ram_size;
00108 uint8_t *ram_dirty;
00109 KQEMU_PAD32(uint32_t padding2;)
00110 uint64_t *pages_to_flush;
00111 KQEMU_PAD32(uint32_t padding4;)
00112 uint64_t *ram_pages_to_update;
00113 KQEMU_PAD32(uint32_t padding5;)
00114 uint64_t *modified_ram_pages;
00115 KQEMU_PAD32(uint32_t padding6;)
00116 };
00117
00118 #define KQEMU_IO_MEM_RAM 0
00119 #define KQEMU_IO_MEM_ROM 1
00120 #define KQEMU_IO_MEM_COMM 2
00121 #define KQEMU_IO_MEM_UNASSIGNED 3
00122
00123 struct kqemu_phys_mem {
00124 uint64_t phys_addr;
00125
00126 uint64_t size;
00127 uint64_t ram_addr;
00128 uint32_t io_index;
00129 uint32_t padding1;
00130 };
00131
00132 #define KQEMU_RET_ABORT (-1)
00133 #define KQEMU_RET_EXCEPTION 0x0000
00134 #define KQEMU_RET_INT 0x0100
00135 #define KQEMU_RET_SOFTMMU 0x0200
00136
00137 #define KQEMU_RET_INTR 0x0201
00138 #define KQEMU_RET_SYSCALL 0x0300
00139
00140 #ifdef _WIN32
00141 #define KQEMU_EXEC CTL_CODE(FILE_DEVICE_UNKNOWN, 1, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
00142 #define KQEMU_INIT CTL_CODE(FILE_DEVICE_UNKNOWN, 2, METHOD_BUFFERED, FILE_WRITE_ACCESS)
00143 #define KQEMU_GET_VERSION CTL_CODE(FILE_DEVICE_UNKNOWN, 3, METHOD_BUFFERED, FILE_READ_ACCESS)
00144 #define KQEMU_MODIFY_RAM_PAGES CTL_CODE(FILE_DEVICE_UNKNOWN, 4, METHOD_BUFFERED, FILE_WRITE_ACCESS)
00145 #define KQEMU_SET_PHYS_MEM CTL_CODE(FILE_DEVICE_UNKNOWN, 5, METHOD_BUFFERED, FILE_WRITE_ACCESS)
00146 #else
00147 #define KQEMU_EXEC _IOWR('q', 1, struct kqemu_cpu_state)
00148 #define KQEMU_INIT _IOW('q', 2, struct kqemu_init)
00149 #define KQEMU_GET_VERSION _IOR('q', 3, int)
00150 #define KQEMU_MODIFY_RAM_PAGES _IOW('q', 4, int)
00151 #define KQEMU_SET_PHYS_MEM _IOW('q', 5, struct kqemu_phys_mem)
00152 #endif
00153
00154 #endif