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sst/core/techModels/libsim-panalyzer/libpa_lv1/lv1_uarch_panalyzer.h

00001 /*
00002 * lv1_uarch_panalyzer.h - contains top level panalyzer. This integrate all the
00003 * power dissipation from functional units (e.g., il1 cache, aio).
00004 *
00005 * This file is a part of the PowerAnalyzer tool suite written by
00006 * Nam Sung Kim as a part of the PowerAnalyzer Project.
00007 *  
00008 * The tool suite is currently maintained by Nam Sung Kim.
00009 * 
00010 * Copyright (C) 2001 by Nam Sung Kim
00011 *
00012 * Revised by Taeho Kgil
00013 *
00014 * This source file is distributed "as is" in the hope that it will be
00015 * useful.  The tool set comes with no warranty, and no author or
00016 * distributor accepts any responsibility for the consequences of its
00017 * use. 
00018 * 
00019 * Everyone is granted permission to copy, modify and redistribute
00020 * this tool set under the following conditions:
00021 * 
00022 *    This source code is distributed for non-commercial use only. 
00023 *    Please contact the maintainer for restrictions applying to 
00024 *    commercial use.
00025 *
00026 *    Permission is granted to anyone to make or distribute copies
00027 *    of this source code, either as received or modified, in any
00028 *    medium, provided that all copyright notices, permission and
00029 *    nonwarranty notices are preserved, and that the distributor
00030 *    grants the recipient permission for further redistribution as
00031 *    permitted by this document.
00032 *
00033 *    Permission is granted to distribute this file in compiled
00034 *    or executable form under the same conditions that apply for
00035 *    source code, provided that either:
00036 *
00037 *    A. it is accompanied by the corresponding machine-readable
00038 *       source code,
00039 *    B. it is accompanied by a written offer, with no time limit,
00040 *       to give anyone a machine-readable copy of the corresponding
00041 *       source code in return for reimbursement of the cost of
00042 *       distribution.  This written offer must permit verbatim
00043 *       duplication by anyone, or
00044 *    C. it is distributed by someone who received only the
00045 *       executable form, and is accompanied by a copy of the
00046 *       written offer of source code that they received concurrently.
00047 *
00048 * In other words, you are welcome to use, share and improve this
00049 * source file.  You are forbidden to forbid anyone else to use, share
00050 * and improve what you give them.
00051 */
00052 
00053 #ifndef UARCH_PANALYZER_H
00054 #define UARCH_PANALYZER_H
00055 #include "../host.h"
00056 #include "../stats.h"
00057 
00058 // #include "lv1_panalyzer.h"
00059 /* uarch power specification type: 
00060  * contain all the info for analyzing io pdissipation */
00061 typedef struct _fu_lv1_arch_pspec_t {
00062         char *name;     /* name */
00063         double opfreq, volt; /* operating frequency/supply voltage */
00064         double max_power;
00065         double uarch_power;
00066         double uarch_total_power;
00067 #ifdef PA_TRANS_COUNT   
00068         int aio_trans;
00069         int dio_trans;
00070 #endif  
00071         fu_lv1_io_pspec_t *aio, *dio;
00072         fu_lv1_rf_pspec_t *rf;
00073         fu_lv1_alu_pspec_t *alu;
00074         fu_lv1_fpu_pspec_t *fpu;
00075         fu_lv1_mult_pspec_t *mult;
00076         fu_lv1_bpred_pspec_t *bpred;
00077         fu_lv1_cache_pspec_t *il1, *dl1, *il2, *dl2, *itlb, *dtlb;
00078         fu_lv1_clock_pspec_t *clock;
00079 
00080 } fu_lv1_uarch_pspec_t;
00081 
00082 /* uarch: micro architecture */
00083 fu_lv1_uarch_pspec_t *
00084 create_lv1_uarch_panalyzer(
00085         char *name,
00086 //      fu_lv1_Ceff_list_t *Ceff_list, /* netlist for Ceff, read from option */
00087         double opfreq, double volt, /* operating frequency/supply voltage */
00088 //      fu_io_pspec_t *aio, fu_io_pspec_t *dio,
00089 /*      fu_sbank_pspec_t *irf, fu_sbank_pspec_t *fprf,
00090         fu_sbank_pspec_t *bimod, fu_sbank_pspec_t *lev1, fu_sbank_pspec_t *lev2,  
00091         fu_sbank_pspec_t *ras,
00092         fu_cache_pspec_t *il1, fu_cache_pspec_t *dl1,
00093         fu_cache_pspec_t *il2, fu_cache_pspec_t *dl2,
00094         fu_cache_pspec_t *itlb, fu_cache_pspec_t *dtlb,
00095         fu_cache_pspec_t *btb, */
00096         fu_lv1_alu_pspec_t *alu,
00097         fu_lv1_fpu_pspec_t *fpu,
00098         fu_lv1_bpred_pspec_t *bpred,
00099         fu_lv1_mult_pspec_t *mult,
00100         fu_lv1_rf_pspec_t *rf,
00101         fu_lv1_cache_pspec_t *il1,
00102         fu_lv1_cache_pspec_t *dl1,
00103         fu_lv1_cache_pspec_t *il2,
00104         fu_lv1_cache_pspec_t *dl2,
00105         fu_lv1_cache_pspec_t *itlb,
00106         fu_lv1_cache_pspec_t *dtlb
00107 //      fu_clock_pspec_t *clock
00108         );
00109 
00110 /* top level panalyzer: 
00111  * this routine integrate all the power dissipation from the functional units 
00112  * at each simulation cycle */
00113 void 
00114 lv1_uarch_panalyzer(
00115         fu_lv1_uarch_pspec_t *pspec,
00116         tick_t now,
00117         void * user_data
00118         );
00119 void 
00120 lv1_uarch_clear_panalyzer(
00121         fu_lv1_uarch_pspec_t *pspec
00122         );
00123 
00124 #endif /* UARCH_PANALYZER_H */

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