00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049 #ifndef XML_PARSE_H_
00050 #define XML_PARSE_H_
00051
00052
00053
00054
00055
00056
00057 #include <stdio.h>
00058 #include "xmlParser.h"
00059 #include <string.h>
00060 #include <iostream>
00061 using namespace std;
00062
00063
00064
00065
00066
00067
00068 typedef struct{
00069 int prediction_width;
00070 char prediction_scheme[20];
00071 int predictor_size;
00072 int predictor_entries;
00073 int local_predictor_size;
00074 int local_predictor_entries;
00075 int global_predictor_entries;
00076 int global_predictor_bits;
00077 int chooser_predictor_entries;
00078 int chooser_predictor_bits;
00079 int predictor_accesses;
00080 } predictor_systemcore;
00081 typedef struct{
00082 int number_entries;
00083 int total_hits;
00084 int total_accesses;
00085 int total_misses;
00086 } itlb_systemcore;
00087 typedef struct{
00088
00089 int icache_config[20];
00090 int buffer_sizes[20];
00091
00092 int total_accesses;
00093 int read_accesses;
00094 int read_misses;
00095 int replacements;
00096 int read_hits;
00097 int total_hits;
00098 int total_misses;
00099 int miss_buffer_access;
00100 int fill_buffer_accesses;
00101 int prefetch_buffer_accesses;
00102 int prefetch_buffer_writes;
00103 int prefetch_buffer_reads;
00104 int prefetch_buffer_hits;
00105 } icache_systemcore;
00106 typedef struct{
00107
00108 int number_entries;
00109
00110 int total_accesses;
00111 int read_accesses;
00112 int write_accesses;
00113 int write_hits;
00114 int read_hits;
00115 int read_misses;
00116 int write_misses;
00117 int total_hits;
00118 int total_misses;
00119 } dtlb_systemcore;
00120 typedef struct{
00121
00122 int dcache_config[20];
00123 int buffer_sizes[20];
00124
00125 int total_accesses;
00126 int read_accesses;
00127 int write_accesses;
00128 int total_hits;
00129 int total_misses;
00130 int read_hits;
00131 int write_hits;
00132 int read_misses;
00133 int write_misses;
00134 int replacements;
00135 int write_backs;
00136 int miss_buffer_access;
00137 int fill_buffer_accesses;
00138 int prefetch_buffer_accesses;
00139 int prefetch_buffer_writes;
00140 int prefetch_buffer_reads;
00141 int prefetch_buffer_hits;
00142 int wbb_writes;
00143 int wbb_reads;
00144 } dcache_systemcore;
00145 typedef struct{
00146
00147 int BTB_config[20];
00148
00149 int total_accesses;
00150 int read_accesses;
00151 int write_accesses;
00152 int total_hits;
00153 int total_misses;
00154 int read_hits;
00155 int write_hits;
00156 int read_misses;
00157 int write_misses;
00158 int replacements;
00159 } BTB_systemcore;
00160 typedef struct{
00161
00162 int clock_rate;
00163 int machine_bits;
00164 int virtual_address_width;
00165 int physical_address_width;
00166 int opcode_width;
00167 int instruction_length;
00168 int machine_type;
00169 int internal_datapath_width;
00170 int number_hardware_threads;
00171 int fetch_width;
00172 int number_instruction_fetch_ports;
00173 int decode_width;
00174 int issue_width;
00175 int commit_width;
00176 int pipelines_per_core[20];
00177 int pipeline_depth[20];
00178 char FPU[20];
00179 char divider_multiplier[20];
00180 int ALU_per_core;
00181 int FPU_per_core;
00182 int instruction_buffer_size;
00183 int decoded_stream_buffer_size;
00184 int instruction_window_scheme;
00185 int instruction_window_size;
00186 int ROB_size;
00187 int archi_Regs_IRF_size;
00188 int archi_Regs_FRF_size;
00189 int phy_Regs_IRF_size;
00190 int phy_Regs_FRF_size;
00191 int rename_scheme;
00192 int register_windows_size;
00193 char LSU_order[20];
00194 int store_buffer_size;
00195 int load_buffer_size;
00196 int memory_ports;
00197 char Dcache_dual_pump[20];
00198 int RAS_size;
00199
00200 int total_instructions;
00201 int int_instructions;
00202 int fp_instructions;
00203 int branch_instructions;
00204 int branch_mispredictions;
00205 int commited_instructions;
00206 int load_instructions;
00207 int store_instructions;
00208 long total_cycles;
00209 int idle_cycles;
00210 long busy_cycles;
00211 int instruction_buffer_reads;
00212 int instruction_buffer_write;
00213 int ROB_reads;
00214 int ROB_writes;
00215 int rename_accesses;
00216 int inst_window_reads;
00217 int inst_window_writes;
00218 int inst_window_wakeup_access;
00219 int inst_window_selections;
00220 int archi_int_regfile_reads;
00221 int archi_float_regfile_reads;
00222 int phy_int_regfile_reads;
00223 int phy_float_regfile_reads;
00224 int phy_int_regfile_writes;
00225 int phy_float_regfile_writes;
00226 int archi_int_regfile_writes;
00227 int archi_float_regfile_writes;
00228 int windowed_reg_accesses;
00229 int windowed_reg_transports;
00230 int function_calls;
00231 int ialu_access;
00232 int fpu_access;
00233 int bypassbus_access;
00234 int load_buffer_reads;
00235 int load_buffer_writes;
00236 int load_buffer_cams;
00237 int store_buffer_reads;
00238 int store_buffer_writes;
00239 int store_buffer_cams;
00240 int store_buffer_forwards;
00241 int main_memory_access;
00242 int main_memory_read;
00243 int main_memory_write;
00244
00245 predictor_systemcore predictor;
00246 itlb_systemcore itlb;
00247 icache_systemcore icache;
00248 dtlb_systemcore dtlb;
00249 dcache_systemcore dcache;
00250 BTB_systemcore BTB;
00251
00252 } system_core;
00253 typedef struct{
00254
00255 int L2Dir_config[20];
00256 int clockrate;
00257 int ports[20];
00258 int device_type;
00259 char threeD_stack[20];
00260
00261 int total_accesses;
00262 int read_accesses;
00263 int write_accesse;
00264 } system_L2directory;
00265 typedef struct{
00266
00267 int L2_config[20];
00268 int clockrate;
00269 int ports[20];
00270 int device_type;
00271 char threeD_stack[20];
00272 int buffer_sizes[20];
00273
00274 int total_accesses;
00275 int read_accesses;
00276 int write_accesses;
00277 int total_hits;
00278 int total_misses;
00279 int read_hits;
00280 int write_hits;
00281 int read_misses;
00282 int write_misses;
00283 int replacements;
00284 int write_backs;
00285 int miss_buffer_accesses;
00286 int fill_buffer_accesses;
00287 int prefetch_buffer_accesses;
00288 int prefetch_buffer_writes;
00289 int prefetch_buffer_reads;
00290 int prefetch_buffer_hits;
00291 int wbb_writes;
00292 int wbb_reads;
00293 } system_L2;
00294 typedef struct{
00295
00296 int L3_config[20];
00297 int clockrate;
00298 int ports[20];
00299 int device_type;
00300 char threeD_stack[20];
00301 int buffer_sizes[20];
00302
00303 int total_accesses;
00304 int read_accesses;
00305 int write_accesses;
00306 int total_hits;
00307 int total_misses;
00308 int read_hits;
00309 int write_hits;
00310 int read_misses;
00311 int write_misses;
00312 int replacements;
00313 int write_backs;
00314 int miss_buffer_accesses;
00315 int fill_buffer_accesses;
00316 int prefetch_buffer_accesses;
00317 int prefetch_buffer_writes;
00318 int prefetch_buffer_reads;
00319 int prefetch_buffer_hits;
00320 int wbb_writes;
00321 int wbb_reads;
00322 } system_L3;
00323 typedef struct{
00324
00325 int number_of_inputs_of_crossbars;
00326 int number_of_outputs_of_crossbars;
00327 int flit_bits;
00328 int input_buffer_entries_per_port;
00329 int ports_of_input_buffer[20];
00330
00331 int crossbar_accesses;
00332 } xbar0_systemNoC;
00333 typedef struct{
00334
00335 int clockrate;
00336 char topology[20];
00337 int horizontal_nodes;
00338 int vertical_nodes;
00339 int has_global_link;
00340 int link_throughput;
00341 int link_latency;
00342 int input_ports;
00343 int output_ports;
00344 int virtual_channel_per_port;
00345 int flit_bits;
00346 int input_buffer_entries_per_vc;
00347 int ports_of_input_buffer[20];
00348 int number_of_crossbars;
00349 char dual_pump[20];
00350 char crossbar_type[20];
00351 char crosspoint_type[20];
00352 xbar0_systemNoC xbar0;
00353 int arbiter_type;
00354
00355 int total_router_accesses;
00356 } system_NoC;
00357 typedef struct{
00358
00359 int mem_tech_node;
00360 int device_clock;
00361 int peak_transfer_rate;
00362 int internal_prefetch_of_DRAM_chip;
00363 int capacity_per_channel;
00364 int number_ranks;
00365 int num_banks_of_DRAM_chip;
00366 int Block_width_of_DRAM_chip;
00367 int output_width_of_DRAM_chip;
00368 int page_size_of_DRAM_chip;
00369 int burstlength_of_DRAM_chip;
00370
00371 int memory_accesses;
00372 int memory_reads;
00373 int memory_writes;
00374 } system_mem;
00375 typedef struct{
00376
00377 int mc_clock;
00378 int llc_line_length;
00379 int number_mcs;
00380 int memory_channels_per_mc;
00381 int req_window_size_per_channel;
00382 int IO_buffer_size_per_channel;
00383 int databus_width;
00384 int addressbus_width;
00385
00386 int memory_accesses;
00387 int memory_reads;
00388 int memory_writes;
00389 } system_mc;
00390
00391 typedef struct{
00392
00393 int number_of_cores;
00394 int number_of_L2s;
00395 int number_of_L3s;
00396 int number_of_NoCs;
00397
00398 int homogeneous_cores;
00399 double core_tech_node;
00400 int target_core_clockrate;
00401 int target_chip_area;
00402 int temperature;
00403 int number_cache_levels;
00404 int L1_property;
00405 int L2_property;
00406 int homogeneous_L2s;
00407 int L3_property;
00408 int homogeneous_L3s;
00409 int homogeneous_NoCs;
00410 int Max_area_deviation;
00411 int Max_power_deviation;
00412 int device_type;
00413 int opt_dynamic_power;
00414 int opt_lakage_power;
00415 int opt_clockrate;
00416 int opt_area;
00417 int interconnect_projection_type;
00418 int machine_bits;
00419 int virtual_address_width;
00420 int physical_address_width;
00421 int virtual_memory_page_size;
00422
00423
00424
00425 system_core core[32];
00426 system_L2directory L2directory;
00427 system_L2 L2[32];
00428 system_L3 L3[32];
00429 system_NoC NoC[32];
00430 system_mem mem;
00431 system_mc mc;
00432 } root_system;
00433
00434 class ParseXML
00435 {
00436 public:
00437 void parse(char* filepath);
00438 void initialize();
00439 public:
00440 root_system sys;
00441 };
00442
00443
00444 #endif
00445
00446
00447
00448