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sst/core/techModels/libMcPAT/processor.h

00001 /*****************************************************************************
00002  *                                McPAT
00003  *                      SOFTWARE LICENSE AGREEMENT
00004  *            Copyright 2009 Hewlett-Packard Development Company, L.P.
00005  *                          All Rights Reserved
00006  *
00007  * Permission to use, copy, and modify this software and its documentation is
00008  * hereby granted only under the following terms and conditions.  Both the
00009  * above copyright notice and this permission notice must appear in all copies
00010  * of the software, derivative works or modified versions, and any portions
00011  * thereof, and both notices must appear in supporting documentation.
00012  *
00013  * Any User of the software ("User"), by accessing and using it, agrees to the
00014  * terms and conditions set forth herein, and hereby grants back to Hewlett-
00015  * Packard Development Company, L.P. and its affiliated companies ("HP") a
00016  * non-exclusive, unrestricted, royalty-free right and license to copy,
00017  * modify, distribute copies, create derivate works and publicly display and
00018  * use, any changes, modifications, enhancements or extensions made to the
00019  * software by User, including but not limited to those affording
00020  * compatibility with other hardware or software, but excluding pre-existing
00021  * software applications that may incorporate the software.  User further
00022  * agrees to use its best efforts to inform HP of any such changes,
00023  * modifications, enhancements or extensions.
00024  *
00025  * Correspondence should be provided to HP at:
00026  *
00027  * Director of Intellectual Property Licensing
00028  * Office of Strategy and Technology
00029  * Hewlett-Packard Company
00030  * 1501 Page Mill Road
00031  * Palo Alto, California  94304
00032  *
00033  * The software may be further distributed by User (but not offered for
00034  * sale or transferred for compensation) to third parties, under the
00035  * condition that such third parties agree to abide by the terms and
00036  * conditions of this license.
00037  *
00038  * THE SOFTWARE IS PROVIDED "AS IS" WITH ANY AND ALL ERRORS AND DEFECTS
00039  * AND USER ACKNOWLEDGES THAT THE SOFTWARE MAY CONTAIN ERRORS AND DEFECTS.
00040  * HP DISCLAIMS ALL WARRANTIES WITH REGARD TO THE SOFTWARE, INCLUDING ALL
00041  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.   IN NO EVENT SHALL
00042  * HP BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
00043  * OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
00044  * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER ACTION, ARISING
00045  * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE SOFTWARE.
00046  *
00047  ***************************************************************************/
00048 #ifndef PROCESSOR_H_
00049 #define PROCESSOR_H_
00050 
00051 #include "XML_Parse.h"
00052 #include "area.h"
00053 #include "decoder.h"
00054 #include "parameter.h"
00055 //#include "io.h"
00056 #include "array.h"
00057 #include "wires.h"
00058 #include "arbiter.h"
00059 //#include "Undifferentiated_Core_Area.h"
00060 #include <vector>
00061 #include "basic_components.h"
00062 #include "core.h"
00063 #include "memoryctrl.h"
00064 #include "router.h"
00065 #include "sharedcache.h"
00066 
00067 class Processor
00068 {
00069   public:
00070     vector<InorderCore> inordercores;
00071     vector<OOOCore> ooocores;
00072     vector<SharedCache> l2array, l3array;
00073     vector<Router>  localRouter, globalRouter;//Actually this is NOC not just router. Each NoC can have multiple routers.//TODO: further divide the NOCs and routers
00074     //vector<MemoryController> mc;
00075     MemoryController mc;
00076     cache_processor directory;
00077     ParseXML *XML;
00078     wire        globalInterconnect;
00079     MCclock_network globalClock;
00080     int numCores;
00081     int numL2caches;
00082     int numL2directories;
00083     int numNOCs;
00084     int numLocalSwitches;
00085     bool inorder, homoCore, homoL2, homoL3, homoNOC;
00086     double area, maxDynamicPower, runtimeDynamicPower, totalLeakage, totalPower;
00087     //void initialize(ParseXML *XML_interface);
00088     void initialize(ParseXML *XML_interface);
00089     void compute();
00090     void output_McPAT();
00091     void output_McPAT_console();
00092 
00093     /* Added for SST*/
00094     //inorder
00095     cache_processor SSTInorderReturnICACHE(void){ return(inordercores[0].SSTreturnICACHE()); };
00096     cache_processor SSTInorderReturnDCACHE(void){ return(inordercores[0].SSTreturnDCACHE()); };
00097     tlb_core SSTInorderReturnITLB(void){ return(inordercores[0].SSTreturnITLB()); };
00098     tlb_core SSTInorderReturnDTLB(void){ return(inordercores[0].SSTreturnDTLB()); };
00099     RF_core SSTInorderReturnIRF(void){ return(inordercores[0].SSTreturnIRF()); };
00100     RF_core SSTInorderReturnFRF(void){ return(inordercores[0].SSTreturnFRF()); };
00101     RF_core SSTInorderReturnRFWIN(void){ return(inordercores[0].SSTreturnRFWIN()); };
00102     IB_core SSTInorderReturnIB(void){ return(inordercores[0].SSTreturnIB()); };
00103     RS_core SSTInorderReturnIRS(void){ return(inordercores[0].SSTreturnIRS()); };
00104     full_decoder SSTInorderReturnDECODER(void){ return(inordercores[0].SSTreturnDECODER()); };
00105     core_pipeline SSTInorderReturnPIPELINE(void){ return(inordercores[0].SSTreturnPIPELINE()); };
00106     resultbus SSTInorderReturnINTBYPASS(void){ return (inordercores[0].SSTreturnINTBYPASS()); };
00107     resultbus SSTInorderReturnINTTAGBYPASS(void){ return(inordercores[0].SSTreturnINTTAGBYPASS()); };
00108     resultbus SSTInorderReturnFPBYPASS(void){ return(inordercores[0].SSTreturnFPBYPASS()); };
00109     selection_logic SSTInorderReturnINSTSELEC(void){ return(inordercores[0].SSTreturnINSTSELEC()); };
00110     dep_resource_conflict_check SSTInorderReturnIDCL(void){ return (inordercores[0].SSTreturnIDCL()); };
00111     dep_resource_conflict_check SSTInorderReturnFDCL(void){ return (inordercores[0].SSTreturnFDCL()); };
00112     MCclock_network SSTInorderReturnCLOCK(void){ return (inordercores[0].SSTreturnCLOCK()); };
00113     UndifferentiatedCore SSTInorderReturnUNCORE(void){ return (inordercores[0].SSTreturnUNCORE()); };   
00114     LSQ_core SSTInorderReturnLSQ(void){ return (inordercores[0].SSTreturnLSQ()); };
00115     //ooo
00116     cache_processor SSToooReturnICACHE(void){ return(ooocores[0].SSTreturnICACHE()); };
00117     cache_processor SSToooReturnDCACHE(void){ return(ooocores[0].SSTreturnDCACHE()); };
00118     tlb_core SSToooReturnITLB(void){ return(ooocores[0].SSTreturnITLB()); };
00119     tlb_core SSToooReturnDTLB(void){ return(ooocores[0].SSTreturnDTLB()); };
00120     RF_core SSToooReturnIRF(void){ return(ooocores[0].SSTreturnIRF()); };
00121     RF_core SSToooReturnFRF(void){ return(ooocores[0].SSTreturnFRF()); };
00122     RF_core SSToooReturnRFWIN(void){ return(ooocores[0].SSTreturnRFWIN()); };
00123     IB_core SSToooReturnIB(void){ return(ooocores[0].SSTreturnIB()); };
00124     RS_core SSToooReturnIRS(void){ return(ooocores[0].SSTreturnIRS()); };
00125     full_decoder SSToooReturnDECODER(void){ return(ooocores[0].SSTreturnDECODER()); };
00126     core_pipeline SSToooReturnPIPELINE(void){ return(ooocores[0].SSTreturnPIPELINE()); };
00127     resultbus SSToooReturnINTBYPASS(void){ return (ooocores[0].SSTreturnINTBYPASS()); };
00128     resultbus SSToooReturnINTTAGBYPASS(void){ return(ooocores[0].SSTreturnINTTAGBYPASS()); };
00129     resultbus SSToooReturnFPBYPASS(void){ return(ooocores[0].SSTreturnFPBYPASS()); };
00130     selection_logic SSToooReturnINSTSELEC(void){ return(ooocores[0].SSTreturnINSTSELEC()); };
00131     dep_resource_conflict_check SSToooReturnIDCL(void){ return (ooocores[0].SSTreturnIDCL()); };
00132     dep_resource_conflict_check SSToooReturnFDCL(void){ return (ooocores[0].SSTreturnFDCL()); };
00133     MCclock_network SSToooReturnCLOCK(void){ return (ooocores[0].SSTreturnCLOCK()); };
00134     UndifferentiatedCore SSToooReturnUNCORE(void){ return (ooocores[0].SSTreturnUNCORE()); };   
00135     LSQ_core SSToooReturnLSQ(void){ return (ooocores[0].SSTreturnLSQ()); };
00136     LSQ_core SSToooReturnLOADQ(void){ return (ooocores[0].SSTreturnLOADQ());  };
00137         ROB_core SSToooReturnROB(void){ return ooocores[0].SSTreturnROB(); };
00138         predictor_core SSToooReturnPREDICTOR(void){ return ooocores[0].SSTreturnPREDICTOR(); };
00139         BTB_core SSToooReturnBTB(void){ return ooocores[0].SSTreturnBTB();  };
00140         RS_core SSToooReturnIISQ(void){ return ooocores[0].SSTreturnIISQ();  };
00141         RS_core SSToooReturnFISQ(void){ return ooocores[0].SSTreturnFISQ();  };
00142         RF_core SSToooReturnPHYIRF(void){ return ooocores[0].SSTreturnPHYIRF(); };
00143         RF_core SSToooReturnPHYFRF(void){ return ooocores[0].SSTreturnPHYFRF(); };
00144         resultbus SSToooReturnFPTAGBYPASS(void){ return ooocores[0].SSTreturnFPTAGBYPASS(); };
00145         RAT_core SSToooReturnIRRAT(void){ return ooocores[0].SSTreturnIRRAT(); };
00146         RAT_core SSToooReturnFRRAT(void){ return ooocores[0].SSTreturnFRRAT(); };
00147         RAT_core SSToooReturnIFRAT(void){ return ooocores[0].SSTreturnIFRAT(); };
00148         RAT_core SSToooReturnFFRAT(void){ return ooocores[0].SSTreturnFFRAT(); };
00149         RAT_core SSToooReturnIFRATCG(void){ return ooocores[0].SSTreturnIFRATCG(); };
00150         RAT_core SSToooReturnFFRATCG(void){ return ooocores[0].SSTreturnFFRATCG(); };
00151     //L2 
00152     cache_processor  SSTReturnL2CACHE(int i){ return l2array[i].SSTreturnL2CACHE(); }; 
00153     cache_processor  SSTReturnL2DIRECTORY(int i){ return l2array[i].SSTreturnDIRECTORY(); }; 
00154     pipeline  SSTReturnL2PIPELOGICCACHE(int i){ return l2array[i].SSTreturnPIPELOGICCACHE(); }; 
00155     pipeline  SSTReturnL2PIPELOGICDIRECTORY(int i){ return l2array[i].SSTreturnPIPELOGICDIRECTORY(); }; 
00156     MCclock_network  SSTReturnL2CLOCKNETWORK(int i){ return l2array[i].SSTreturnCLOCKNETWORK(); }; 
00157     //MC
00158     cache_processor  SSTReturnMCFRONTBUF(void){ return mc.SSTreturnMCFRONTBUF(); }; 
00159     cache_processor  SSTReturnMCREADBUF(void){ return mc.SSTreturnMCREADBUF(); }; 
00160     cache_processor  SSTReturnMCWRITEBUF(void){ return mc.SSTreturnMCWRITEBUF(); };
00161     selection_logic  SSTReturnMCARB(void){ return mc.SSTreturnMCARB(); }; 
00162     MCBackend  SSTReturnMCBACKEND(void){ return mc.SSTreturnMCBACKEND(); }; 
00163     MCPHY  SSTReturnMCPHY(void){ return mc.SSTreturnMCPHY(); };  
00164     pipeline  SSTReturnMCPIPE(void){ return mc.SSTreturnMCPIPE(); }; 
00165     MCclock_network  SSTReturnMCCLOCKNETWORK(void){ return mc.SSTreturnMCCLOCKNETWORK(); }; 
00166     //LOCAL ROUTER
00167     cache_processor SSTlocalReturnINPUTBUF(void){ return  localRouter[0].SSTreturnINPUTBUF(); }; 
00168     cache_processor SSTlocalReturnRTABLE(void){ return  localRouter[0].SSTreturnRTABLE(); }; 
00169     crossbarswitch SSTlocalReturnXBAR(void){ return  localRouter[0].SSTreturnXBAR(); }; 
00170     Arbiter SSTlocalReturnVC1(void){ return   localRouter[0].SSTreturnVC1(); };
00171     Arbiter SSTlocalReturnVC2(void){ return   localRouter[0].SSTreturnVC2(); };
00172     Arbiter SSTlocalReturnSWITCH1(void){ return   localRouter[0].SSTreturnSWITCH1(); };
00173     Arbiter SSTlocalReturnSWITCH2(void){ return   localRouter[0].SSTreturnSWITCH2(); }; 
00174     wire SSTlocalReturnINTERCONN(void){ return  localRouter[0].SSTreturnINTERCONN(); }; 
00175     pipeline SSTlocalReturnRTPIPE(void){ return  localRouter[0].SSTreturnRTPIPE(); }; 
00176     MCclock_network SSTlocalReturnRTCLOCK(void){ return  localRouter[0].SSTreturnRTCLOCK(); }; 
00177     //GLOBAL ROUTER
00178     cache_processor SSTglobalReturnINPUTBUF(void){ return  globalRouter[0].SSTreturnINPUTBUF(); }; 
00179     cache_processor SSTglobalReturnRTABLE(void){ return  globalRouter[0].SSTreturnRTABLE(); }; 
00180     crossbarswitch SSTglobalReturnXBAR(void){ return  globalRouter[0].SSTreturnXBAR(); }; 
00181     Arbiter SSTglobalReturnVC1(void){ return   globalRouter[0].SSTreturnVC1(); };
00182     Arbiter SSTglobalReturnVC2(void){ return   globalRouter[0].SSTreturnVC2(); };
00183     Arbiter SSTglobalReturnSWITCH1(void){ return   globalRouter[0].SSTreturnSWITCH1(); };
00184     Arbiter SSTglobalReturnSWITCH2(void){ return   globalRouter[0].SSTreturnSWITCH2(); }; 
00185     wire SSTglobalReturnINTERCONN(void){ return  globalRouter[0].SSTreturnINTERCONN(); }; 
00186     pipeline SSTglobalReturnRTPIPE(void){ return  globalRouter[0].SSTreturnRTPIPE(); }; 
00187     MCclock_network SSTglobalReturnRTCLOCK(void){ return  globalRouter[0].SSTreturnRTCLOCK(); }; 
00188 
00189 };
00190 
00191 #endif /* PROCESSOR_H_ */

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