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00043 #ifndef __UCACHE_H__
00044 #define __UCACHE_H__
00045
00046 #include <list>
00047 #include "area.h"
00048 #include "router.h"
00049 #include "nuca.h"
00050
00051
00052 class min_values_t
00053 {
00054 public:
00055 double min_delay;
00056 double min_dyn;
00057 double min_leakage;
00058 double min_area;
00059 double min_cyc;
00060
00061 min_values_t() : min_delay(BIGNUM), min_dyn(BIGNUM), min_leakage(BIGNUM), min_area(BIGNUM), min_cyc(BIGNUM) { }
00062
00063 void update_min_values(const min_values_t * val);
00064 void update_min_values(const uca_org_t & res);
00065 void update_min_values(const nuca_org_t * res);
00066 void update_min_values(const mem_array * res);
00067 };
00068
00069
00070
00071 struct solution
00072 {
00073 int tag_array_index;
00074 int data_array_index;
00075 list<mem_array *>::iterator tag_array_iter;
00076 list<mem_array *>::iterator data_array_iter;
00077 double access_time;
00078 double cycle_time;
00079 double area;
00080 double efficiency;
00081 powerDef total_power;
00082 };
00083
00084
00085
00086 bool calculate_time(
00087 bool is_tag,
00088 int pure_ram,
00089 bool pure_cam,
00090 double Nspd,
00091 unsigned int Ndwl,
00092 unsigned int Ndbl,
00093 unsigned int Ndcm,
00094 unsigned int Ndsam_lev_1,
00095 unsigned int Ndsam_lev_2,
00096 mem_array *ptr_array,
00097 int flag_results_populate,
00098 results_mem_array *ptr_results,
00099 uca_org_t *ptr_fin_res,
00100 bool is_main_mem);
00101
00102 void solve(uca_org_t *fin_res);
00103 void init_tech_params(double tech, bool is_tag);
00104
00105
00106 struct calc_time_mt_wrapper_struct
00107 {
00108 uint32_t tid;
00109 bool is_tag;
00110 bool pure_ram;
00111 bool pure_cam;
00112 bool is_main_mem;
00113 double Nspd_min;
00114
00115 min_values_t * data_res;
00116 min_values_t * tag_res;
00117
00118 list<mem_array *> data_arr;
00119 list<mem_array *> tag_arr;
00120 };
00121
00122 void *calc_time_mt_wrapper(void * void_obj);
00123
00124
00125 void SSTupdate(uca_org_t *fin_res);
00126
00127
00128
00129
00130 #endif