Data Structures | Public Member Functions

MemoryModel Class Reference

Memory model class. More...

#include <MemoryModel.h>

Data Structures

class  Config
class  Cost
struct  MemoryOp
 Memory operation list node type.

Public Member Functions

 MemoryModel ()
 Memory model constructor.
 ~MemoryModel ()
 Memory model destructor.
void initLatencies (unsigned int latTLB, unsigned int latL1, unsigned int latL2, unsigned int latMem)
 Initialize memory hierarchy latencies.
void initProbabilities (double pSTBHit, double pL1Hit, double pL2Hit, double pTLBMiss, double pICHit, double pIL2Hit, double pITLBMiss)
 Initialize memory probabilities.
void getDataLoadStats (unsigned long long *numLoads, unsigned long long *numSTBHits, unsigned long long *numL1Hits, unsigned long long *numL2Hits, unsigned long long *numMemoryHits, unsigned long long *numTLBMisses)
 Get data load operation statistics.
void getInstLoadStats (unsigned long long *numILoads, unsigned long long *numICHits, unsigned long long *numIL2Hits, unsigned long long *numIMemoryHits, unsigned long long *numITLBMisses)
 Get instruction load statistics.
void getStoreStats (unsigned long long *numStores)
 Get store operation statistics.
CycleCount serveLoad (CycleCount currentCycle, Address address, unsigned int numBytes, CycleTracker::CycleReason *reason)
 Compute cost of serving a data load.
CycleCount serveILoad (CycleCount currentCycle, Address address, unsigned int numBytes, CycleTracker::CycleReason *reason)
 Compute cost of serving an instruction fetch load.
CycleCount serveStore (CycleCount currentCycle, Address address, unsigned int numBytes, CycleTracker::CycleReason *reason)
 Compute cost of serving a data store.
void initLatencies (unsigned int latTLB, unsigned int latL1, unsigned int latL2, unsigned int latL3, unsigned int latMem)
 Initialize memory hierarchy latencies.
void initProbabilities (double pSTBHit, double pL1Hit, double pL2Hit, double pL3Hit, double pTLBMiss, double pICHit, double pIL2Hit, double pIL3Hit, double pITLBMiss)
 Initialize memory probabilities.
void getDataLoadStats (unsigned long long *numLoads, unsigned long long *numSTBHits, unsigned long long *numL1Hits, unsigned long long *numL2Hits, unsigned long long *numL3Hits, unsigned long long *numMemoryHits, unsigned long long *numTLBMisses)
 Get data load operation statistics.
void getInstLoadStats (unsigned long long *numILoads, unsigned long long *numICHits, unsigned long long *numIL2Hits, unsigned long long *numIMemoryHits, unsigned long long *numITLBMisses)
void getStoreStats (unsigned long long *numStores)
CycleCount serveLoad (CycleCount currentCycle, Address address, unsigned int numBytes)
 Compute cost of serving a data load.
CycleCount serveILoad (CycleCount currentCycle, Address address, unsigned int numBytes)
 Compute cost of serving an instruction fetch load.
CycleCount serveStore (CycleCount currentCycle, Address address, unsigned int numBytes)
 Compute cost of serving a data store.

Detailed Description

Memory model class.

Memory model should:


Constructor & Destructor Documentation

MemoryModel::MemoryModel (  ) 

Memory model constructor.

This routine just zero's out fields. Use the init methods to populate the object with real data

MemoryModel::~MemoryModel (  ) 

Memory model destructor.

This deletes any outstanding memory ops in the queue


Member Function Documentation

void MemoryModel::initLatencies ( unsigned int  latTLB,
unsigned int  latL1,
unsigned int  latL2,
unsigned int  latL3,
unsigned int  latMem 
)

Initialize memory hierarchy latencies.

Parameters:
latTLB is the TLB latency in cycles
latL1 is the L1 cache latency in cycles
latL2 is the L2 cache latency in cycles
latMem is the memory access latency in cycles
void MemoryModel::initLatencies ( unsigned int  latTLB,
unsigned int  latL1,
unsigned int  latL2,
unsigned int  latMem 
)

Initialize memory hierarchy latencies.

Parameters:
latTLB is the TLB latency in cycles
latL1 is the L1 cache latency in cycles
latL2 is the L2 cache latency in cycles
latMem is the memory access latency in cycles

Referenced by McOpteron::init(), and McNiagara::init().

void MemoryModel::initProbabilities ( double  pSTBHit,
double  pL1Hit,
double  pL2Hit,
double  pTLBMiss,
double  pICHit,
double  pIL2Hit,
double  pITLBMiss 
)

Initialize memory probabilities.

Right now, these are assumed to be independent, but really should be a CDF.

Parameters:
pSTBHit is the probability a load will be satisfied from the store buffer
pL1Hit is the probability a load is satisfied in the L1 cache given that it missed the store buffer
pL2Hit is the probability a load is satisfied in the L2 cache given that it missed the store buffer and the L1 cache
pTLBMiss is the probability a load or store misses the TLB
pICHit is the probability an instruction fetch is satisfied in the I-cache
pIL2Hit is the probability an instruction fetch is satisfied in L2 cache, given that it missed the I cache
pITLBMiss is the probability an instruction fetch misses the TLB

Referenced by McOpteron::init(), and McNiagara::init().

void MemoryModel::initProbabilities ( double  pSTBHit,
double  pL1Hit,
double  pL2Hit,
double  pL3Hit,
double  pTLBMiss,
double  pICHit,
double  pIL2Hit,
double  pIL3Hit,
double  pITLBMiss 
)

Initialize memory probabilities.

Right now, these are assumed to be independent, but really should be a CDF.

Parameters:
pSTBHit is the probability a load will be satisfied from the store buffer
pL1Hit is the probability a load is satisfied in the L1 cache given that it missed the store buffer
pL2Hit is the probability a load is satisfied in the L2 cache given that it missed the store buffer and the L1 cache
pTLBMiss is the probability a load or store misses the TLB
pICHit is the probability an instruction fetch is satisfied in the I-cache
pIL2Hit is the probability an instruction fetch is satisfied in L2 cache, given that it missed the I cache
pITLBMiss is the probability an instruction fetch misses the TLB
CycleCount MemoryModel::serveILoad ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes,
CycleTracker::CycleReason *  reason 
)

Compute cost of serving an instruction fetch load.

This computes the cycle at which an instruction fetch will be satisfied

Parameters:
currentCycle is the current cycle count when fetch issued
address is the address this fetch is accessing (not used yet)
numbytes is the number of bytes being read (not used yet)
reason is an out-parameter giving the reason for the load delay
Returns:
the cycle count at which the load will be satisfied

Referenced by McNiagara::sim_instruction().

CycleCount MemoryModel::serveILoad ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes 
)

Compute cost of serving an instruction fetch load.

This computes the cycle at which an instruction fetch will be satisfied

Parameters:
currentCycle is the current cycle count when fetch issued
address is the address this fetch is accessing (not used yet)
numbytes is the number of bytes being read (not used yet)
reason is an out-parameter giving the reason for the load delay
Returns:
the cycle count at which the load will be satisfied
CycleCount MemoryModel::serveLoad ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes 
)

Compute cost of serving a data load.

This computes the cycle at which a load will be satisfied.

Parameters:
currentCycle is the current cycle count when load issued
address is the address this load is accessing (not used yet)
numbytes is the number of bytes being read (not used yet)
reason is an out-parameter giving the reason for the load delay
Returns:
the cycle count at which the load will be satisfied
CycleCount MemoryModel::serveLoad ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes,
CycleTracker::CycleReason *  reason 
)

Compute cost of serving a data load.

This computes the cycle at which a load will be satisfied.

Parameters:
currentCycle is the current cycle count when load issued
address is the address this load is accessing (not used yet)
numbytes is the number of bytes being read (not used yet)
reason is an out-parameter giving the reason for the load delay
Returns:
the cycle count at which the load will be satisfied

Referenced by McNiagara::sim_instruction(), and LoadStoreUnit::updateStatus().

CycleCount MemoryModel::serveStore ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes,
CycleTracker::CycleReason *  reason 
)

Compute cost of serving a data store.

This computes the cycle at which a store will be satisfied and how much the store instruction might need to stall.

Parameters:
currentCycle is the current cycle count when store issued
address is the address this store is accessing (not used yet)
numbytes is the number of bytes being written (not used yet)
reason is an out-parameter giving the reason for the store delay
Returns:
the cycle count which the store needs to stall until (different than when the store will be satisfied!)

Referenced by McNiagara::sim_instruction(), and LoadStoreUnit::updateStatus().

CycleCount MemoryModel::serveStore ( CycleCount  currentCycle,
Address  address,
unsigned int  numBytes 
)

Compute cost of serving a data store.

This computes the cycle at which a store will be satisfied and how much the store instruction might need to stall.

Parameters:
currentCycle is the current cycle count when store issued
address is the address this store is accessing (not used yet)
numbytes is the number of bytes being written (not used yet)
reason is an out-parameter giving the reason for the store delay
Returns:
the cycle count which the store needs to stall until (different than when the store will be satisfied!)

The documentation for this class was generated from the following files: