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00015 #ifndef PROCESSOR_H
00016 #define PROCESSOR_H
00017
00018 #include "sst_stdint.h"
00019 #include "sst/core/component.h"
00020 #include <sst/core/cpunicEvent.h>
00021 #include "thread.h"
00022 #include "memory.h"
00023 #include "ptoVMapper.h"
00024 #include "pimSysCallTypes.h"
00025 #include <vector>
00026 #include <utility>
00027 #include <sst_config.h>
00028 #include <boost/serialization/list.hpp>
00029
00030
00031 #if HAVE_PHXSIM_H
00032 #include <../PHXSimC/PHXEvent.h>
00033 #endif
00034
00035 using namespace std;
00036 using namespace SST;
00037
00038 typedef SST::Component* (*ownerCheckFunc)(const simAddress, const simPID);
00039
00040
00041 struct procPIDPair {
00042
00043 processor *first;
00044
00045 simPID second;
00046
00047
00048
00049
00050 string binaryName;
00051
00052 procPIDPair(processor *p, simPID pid) : first(p), second(pid),
00053 binaryName("") {;}
00054 procPIDPair(processor *p, simPID pid, const string b) : first(p), second(pid),
00055 binaryName(b) {;}
00056 };
00057 typedef vector<procPIDPair> procStartVec;
00058 typedef procStartVec (*getFirstThreadsHomeFunc)(string cfgstr);
00059
00060
00061
00062 class processor : public SST::Component, public memory, public ptoVmapper
00063 {
00064 #if 0 // WANT_CHECKPOINT_SUPPORT
00065 BOOST_SERIALIZE {
00066 BOOST_VOID_CAST_REGISTER(processor*,Component*);
00067 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( Component );
00068 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( memory );
00069 ar & BOOST_SERIALIZATION_BASE_OBJECT_NVP( ptoVmapper );
00070 ar & BOOST_SERIALIZATION_NVP(myProcNum);
00071 ar & BOOST_SERIALIZATION_NVP(myCoreNum);
00072 ar & BOOST_SERIALIZATION_NVP(numCores);
00073 }
00074 #endif
00075
00076
00077 protected:
00078 int currentRunningCore;
00079 private:
00080
00081 volatile bool nic_response;
00082
00083
00084
00085 public:
00086 virtual int Setup( ) { return 0; }
00087 virtual int finish( ) { return memory::finish(); }
00088
00089
00090
00091
00092
00093
00094
00095 public:
00096 void procExit() {
00097 unregisterExit();
00098 }
00099
00100
00101
00102
00103 processor(ComponentId_t id, Params_t& params) :
00104 Component( id ), memory(0),
00105 currentRunningCore(-1)
00106 {
00107 setUpLocalDistribution(12, 1);
00108 nic_response= false;
00109 INFO("Processor at %p initialized\n", this);
00110 }
00111
00112
00113
00114
00115
00116
00117 procStartVec getFirstThreadsHomes();
00118 bool CopyToSIM(simAddress dest, const simPID, void* source, const unsigned int Bytes);
00119 bool LoadToSIM(simAddress dest, const simPID, void* source, const unsigned int Bytes);
00120 bool CopyFromSIM(void* dest, const simAddress source, const simPID, const unsigned int Bytes);
00121
00122 int getProcNum() const {return 1;}
00123
00124 int getCoreNum() const {return getCurrentRunningCore();}
00125
00126 virtual int getNumCores() const = 0;
00127 int getCurrentRunningCore() const {return currentRunningCore;}
00128
00129
00130
00131
00132
00133
00134
00135
00136
00137
00138
00139
00140
00141
00142
00143
00144
00145
00146
00147
00148
00149
00150 virtual bool insertThread(thread*)=0;
00151
00152
00153
00154 virtual bool isLocal(const simAddress, const simPID)=0;
00155
00156
00157
00158 virtual bool spawnToCoProc(const PIM_coProc, thread* t, simRegister hint)=0;
00159
00160
00161
00162
00163 virtual bool switchAddrMode(PIM_addrMode) = 0;
00164
00165
00166
00167
00168 virtual exceptType writeSpecial(const PIM_cmd, const int nargs,
00169 const uint *args)=0;
00170
00171
00172
00173
00174 virtual exceptType readSpecial(const PIM_cmd cmd, const int nInArgs,
00175 const int nOutArgs, const simRegister *args,
00176 simRegister *rets) {
00177 exceptType retval = PROC_EXCEPTION;
00178 switch( cmd ) {
00179 case PIM_CMD_GET_NUM_CORE:
00180 rets[0] = ntohl(getNumCores());
00181 retval = NO_EXCEPTION;
00182 break;
00183 case PIM_CMD_GET_CORE_NUM:
00184 rets[0] = ntohl(getCoreNum());
00185 retval = NO_EXCEPTION;
00186 break;
00187 case PIM_CMD_GET_MHZ:
00188
00189 retval = NO_EXCEPTION;
00190 break;
00191 default:
00192 ;
00193 }
00194 return retval;
00195 };
00196
00197
00198
00199
00200 virtual void resetCounters() {
00201 printf("Reset Counters Not Supported on this Processor.\n");
00202 }
00203
00204
00205
00206
00207 static inline void checkNumArgs(const PIM_cmd cmd, const int givenInArgs,
00208 const int givenOutArgs,
00209 const int reqInArgs, const int reqOutArgs) {
00210 if (givenInArgs != reqInArgs) {
00211 printf("Syscall %d does not have %d Input arguments. (%d given)\n", cmd,
00212 reqInArgs, givenInArgs);
00213 }
00214 if (givenOutArgs != reqOutArgs) {
00215 printf("Syscall %d does not have %d Output arguments. (%d given)\n", cmd,
00216 reqOutArgs, givenOutArgs);
00217 }
00218 }
00219
00220
00221 virtual bool forwardToNetsimNIC(int call_num, char *params,
00222 const size_t params_length,
00223 char *buf, const size_t buf_len) = 0;
00224
00225
00226 virtual bool pickupNetsimNIC(CPUNicEvent **event) = 0;
00227
00228
00229 std::list<CPUNicEvent *> staging_area;
00230
00231 int getNICresponse(void) {return !staging_area.empty();}
00232
00233 virtual bool externalMemoryModel() = 0;
00234
00235 virtual bool sendMemoryReq( instType, uint64_t address,
00236 instruction *inst, int mProcID) = 0;
00237 virtual int getOutstandingAdvancedMemReqs(int mProcID, int *max) = 0;
00238 #if HAVE_PHXSIM_H
00239
00240
00241
00242
00243 virtual bool sendMemoryParcel(uint64_t address, instruction *inst,
00244 PHXEvent *pe,
00245 int mProcID) = 0;
00246 #endif
00247
00248 void addNICevent(CPUNicEvent *e) {
00249 staging_area.push_back(e);
00250 }
00251
00252 CPUNicEvent *getNICevent(void) {
00253 CPUNicEvent *rc;
00254
00255 rc= staging_area.front();
00256 staging_area.pop_front();
00257 return rc;
00258 }
00259
00260
00261
00262 virtual void dataCacheInvalidate( simAddress addr ) {WARN("not implemented\n");};
00263
00264 #define CPU_MEM_FUNC_GEN(S) \
00265 virtual uint##S##_t ReadMemory##S(const simAddress sa, const bool s) { \
00266 return memory::ReadMemory##S( getPhysAddr(sa), s); \
00267 } \
00268 virtual bool WriteMemory##S(const simAddress sa, const uint##S##_t d, \
00269 const bool s) { \
00270 return memory::WriteMemory##S( getPhysAddr(sa), d, s); \
00271 }
00272
00273 CPU_MEM_FUNC_GEN(8)
00274 CPU_MEM_FUNC_GEN(16)
00275 CPU_MEM_FUNC_GEN(32)
00276 CPU_MEM_FUNC_GEN(64)
00277
00278 };
00279
00280 #endif